Patents by Inventor Hayk Chukhajyan

Hayk Chukhajyan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for verifying IP integrity in system-on-chip (SOC) design
    Patent number: 7673264
    Abstract: An intellectual property (IP) integrity verification system and method operable with respect to integrating an IP design into a user's embedded IC design. In one embodiment, the IP design is partitioned into a plurality of IP modules based on the requirements of the embedded IC design. For each IP module, a corresponding integrity checker module is provided, wherein each integrity checker module has a port-wise correspondence with its corresponding IP module. The embedded IC design is simulated with the integrity checker modules rather than the IP modules for generating a netlist, which may be verified with respect to any interconnectivity errors associated with the IP modules.
    Type: Grant
    Filed: April 5, 2007
    Date of Patent: March 2, 2010
    Assignee: Virage Logic Corp.
    Inventors: Karen Darbinyan, Hayk Chukhajyan, Albert Harutyunyan, Yervant Zorian