Abstract: A method for updating a current network flow statistic stored in a memory device, comprising: storing a first statistic and a first address corresponding to a location in the memory device in a first stage of a multiple stage delay pipeline; shifting the first statistic and the first address to successive stages of the pipeline during successive clock cycles; at a middle stage of the pipeline, sending a read signal to the memory device to read the current statistic from the location; at a last stage of the pipeline, receiving the current statistic from the memory device in response to the read signal, adding the first statistic to the current statistic to generate an updated statistic, and sending a write signal to the memory device to write the updated statistic to the location; and, if a second statistic for the first address is stored in the first stage of the pipeline while the first statistic is stored in any but the first and last stages of the pipeline, replacing the first statistic with a sum of the f

Abstract: A method for synchronizing a data signal to a clock signal in a source-synchronous system, the source-synchronous system having first and second systems linked by an interface, the first system providing the clock signal to the second system, the second system providing the data signal and a return clock signal synchronous to the data signal to the first system, the method comprising: determining a first time delay between the clock signal and the return clock signal and delaying the data signal by the first time delay; after a predetermined period, determining a second time delay between the clock signal and the return clock signal; determining a difference between the first and second time delays; and, further delaying the data signal by at least a portion of the difference to thereby compensate for a temperature change of the source-synchronous system.

Abstract: A method for synchronizing a data signal to a clock signal in a source-synchronous system, the source-synchronous system having first and second systems linked by an interface, the first system providing the clock signal to the second system, the second system providing the data signal and a return clock signal synchronous to the data signal to the first system, the method comprising: determining a first time delay between the clock signal and the return clock signal and delaying the data signal by the first time delay; after a predetermined period, determining a second time delay between the clock signal and the return clock signal; determining a difference between the first and second time delays; and, further delaying the data signal by at least a portion of the difference to thereby compensate for a temperature change of the source-synchronous system.

Abstract: A method for updating a current network flow statistic stored in a memory device, comprising: storing a first statistic and a first address corresponding to a location in the memory device in a first stage of a multiple stage delay pipeline; shifting the first statistic and the first address to successive stages of the pipeline during successive clock cycles; at a middle stage of the pipeline, sending a read signal to the memory device to read the current statistic from the location; at a last stage of the pipeline, receiving the current statistic from the memory device in response to the read signal, adding the first statistic to the current statistic to generate an updated statistic, and sending a write signal to the memory device to write the updated statistic to the location; and, if a second statistic for the first address is stored in the first stage of the pipeline while the first statistic is stored in any but the first and last stages of the pipeline, replacing the first statistic with a sum of the f