Patents by Inventor HE QIAN

HE QIAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12384015
    Abstract: A telescopic wrench includes an outer tube, an outer sleeve, and an inner rod. The first hole of the outer sleeve ring is fitted onto the outer tube, and the second hole of the outer sleeve provides peripheral contact with the rod section of the inner rod. The outer sleeve forms an external auxiliary fitting structure with the inner rod and outer tube. The telescopic wrench provides an improvement over known structures that are prone to loosening and noise during use. The telescopic wrench enhances the structural strength when subjected to operating forces.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: August 12, 2025
    Inventors: Yi-Fu Chen, He-Qian Chen
  • Patent number: 12387090
    Abstract: A neuron simulation circuit and a neural network apparatus. The neuron simulation circuit includes an operational amplifier, a first resistive device and a second resistive device. The operational amplifier includes a first input terminal, a second input terminal, and an output terminal. The first resistive device is connected between the first input terminal or the second input terminal of the operational amplifier and the output terminal of the operational amplifier. The second resistive device is connected between the output terminal of the operational amplifier and an output terminal of the neuron simulation circuit. The second resistive device includes a threshold switching memristor, and a first terminal of the threshold switching memristor is electrically connected with the output terminal of the neuron simulation circuit. At least one of the first resistive device and the second resistive device includes a dynamic memristor.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: August 12, 2025
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Xinyi Li, Huaqiang Wu, He Qian, Dong Wu
  • Publication number: 20250205863
    Abstract: A torque wrench includes a body portion which as a room and a working member is assembled in the room. The working member includes a rod and a working head protruding from the body portion. A torque sensor is connected to the rod of the working member. A release unit is located in the room of the body portion and movably connected to the rod of the working member. A torque setting unit is located in the room to apply a set torque to the release unit. A controller is connected to the torque wrench and electrically connected to the torque sensor and the torque setting unit. When a force applied to the working member exceeds the set torque, the torque setting unit drives the release unit, causing the working member to be free of force.
    Type: Application
    Filed: December 22, 2023
    Publication date: June 26, 2025
    Inventors: YI-FU CHEN, HE-QIAN CHEN
  • Patent number: 12337441
    Abstract: A socket includes a first section and a second section. The first section is to be connected with a tool. The second section includes an outer face, and a mounting hole is axially defined through the second section and communicates through the first section. The mounting hole includes multiple recesses and multiple sides defined in the inner periphery thereof. The multiple recesses and the multiple sides are located alternatively with each other. Each recess includes a rounded corner formed radially in the inner portion thereof. A triangular groove is formed axially and centrally in each side. The angle between two insides of each groove is smaller than 90 degrees. A rusted or damaged bolt head is engaged with either the rounded corners or the grooves so as to be effectively rotated.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: June 24, 2025
    Inventors: Yi-Fu Chen, He-Qian Chen
  • Patent number: 12332738
    Abstract: A storage and computation integrated apparatus and a calibration method therefor. The storage and computation integrated apparatus includes a first processing unit, which includes: a first computation memristor array; a first calibration memristor array; and a first processing unit. The calibration method includes: determining, by means of off-chip training, a first computation weight matrix which corresponds to a first computation memristor array, and writing the first computation weight matrix into the first computation memristor array; and on the basis of the first computation memristor array where the first computation weight matrix has been written and the first computation weight matrix, performing on-chip training on a first calibration memristor array, so as to adjust a weight value of the first calibration memristor array.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: June 17, 2025
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Bin Gao, Peng Yao, Huaqiang Wu, Jianshi Tang, He Qian
  • Patent number: 12283320
    Abstract: A data processing method based on a memristor array and an electronic apparatus are disclosed. The data processing method based on a memristor array includes: acquiring a plurality of first analog signals; setting the memristor array, and writing data corresponding to a convolution parameter matrix of a convolution processing into the memristor array; inputting the plurality of first analog signals respectively into a plurality of column signal input terminals of the memristor array that has been set, controlling operation of the memristor array to perform the convolution processing on the plurality of first analog signals, and obtaining a plurality of second analog signals after performing the convolution processing at a plurality of row signal output terminals of the memristor array, respectively.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: April 22, 2025
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Huaqiang Wu, Zhengwu Liu, Jianshi Tang, Bin Gao, He Qian
  • Publication number: 20250095728
    Abstract: A computing apparatus and a robustness processing method thereof. The robustness processing method includes: based on model parameters of a target algorithm model, obtaining a mapping relationship between the model parameters and the first computing memristor array; based on an influence factor that determines a critical weight device, determining a way to obtain a weight criticality of the plurality of memristor devices from the influence factor; obtaining an input set of the algorithm model, and determining a criticality value for each of the plurality of memristor devices according to the way; determining a critical weight device among the plurality of memristor devices according to the criticality value for each of the plurality of memristor devices; and based on the critical weight device, performing an optimization processing on the first processing unit.
    Type: Application
    Filed: December 13, 2021
    Publication date: March 20, 2025
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Bin GAO, Peng YAO, Huaqiang WU, Jianshi TANG, He QIAN
  • Publication number: 20250078924
    Abstract: At least one embodiment of the present disclosure provides a data processing method based on a memristor array and an electronic apparatus. The data processing method includes: acquiring a plurality of first analog signals; setting the memristor array, and writing data of a parameter matrix corresponding to the data processing into the memristor array; and inputting the plurality of first analog signals into a plurality of column signal input terminals of the set memristor array, respectively, controlling operation of the memristor array to perform the data processing on the plurality of first analog signals, and obtaining a plurality of second analog signals after performing the data processing at a plurality of row signal output terminals of the memristor array, respectively.
    Type: Application
    Filed: January 11, 2022
    Publication date: March 6, 2025
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Huaqiang WU, Zhengwu LIU, Han ZHAO, Jianshi TANG, Bin GAO, He QIAN
  • Publication number: 20250069772
    Abstract: This application discloses a conductive paste, a preparation method thereof. The conductive paste comprises: a thermoplastic polyurethane, conductive particles, and an organic solvent, the thermoplastic polyurethane and the conductive particles being proportionally mixed in the organic solvent, and the thermoplastic polyurethane being dispersed in the form of particles among the conductive particles. A thermoplastic polyurethane elastomer is used as a binder, and the conductive particles are mixed in the organic solvent containing the thermoplastic polyurethane elastomer. The conductive particles ensure the conductivity of the conductive film prepared using the conductive paste. The thermoplastic polyurethane has strong adhesion ability, and is suitable for use on the surface of most substrates, to form a conductive film with good adhesion and no cracking.
    Type: Application
    Filed: November 12, 2024
    Publication date: February 27, 2025
    Inventors: Jianshi Tang, Zhenxuan Zhao, Yuan Dai, Wangwei Lee, Zhengyou Zhang, Jian Yuan, Huaqiang Wu, He Qian, Bin Gao
  • Patent number: 12226216
    Abstract: A signal processing apparatus and a signal processing method are provided. The signal processing apparatus includes a memristor array, an input circuit, a first switching circuit, a second switching circuit, an output circuit, and a control circuit. The memristor array includes memristor units and is connected to source lines, word lines and bit lines. The control circuit is configured to control the first switching circuit to select at least one source line to apply at least one first signal to the at least one source line respectively, control the second switching circuit to select and activate at least one word line to apply the at least one first signal to a memristor unit corresponding to the at least one word line, and control the output circuit to output a plurality of second signals based on conductivity values of memristors of the memristor array.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: February 18, 2025
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Huaqiang Wu, Zhengwu Liu, Jianshi Tang, Bin Gao, He Qian
  • Publication number: 20250042005
    Abstract: The present invention provides a multi-segment bendable joint, comprising: a jointer, having a rod portion, a first ball head and a second ball head connected at two ends of the rod portion; a first connector, at opposite ends thereof, with a first connecting portion and a first joint slot for receiving the first ball head therein, respectively; and a second connector, at opposite ends thereof, with a second connecting portion and a second joint slot for receiving the second ball head therein, respectively. When one of the first and second connectors is linked to a wrench body and the other acts as a socket, two-segment bending between the socket and the wrench body is allowed, resulting in larger bending angle between the socket and the wrench body compared to conventional products.
    Type: Application
    Filed: August 1, 2023
    Publication date: February 6, 2025
    Inventors: Yi-Fu Chen, He-Qian Chen
  • Patent number: 12217164
    Abstract: A neural network and its information processing method, information processing system. The neural network includes N layers of neuron layers connected to each other one by one, except for a first layer of neuron layer, each of the neurons of the other neuron layers includes m dendritic units and one hippocampal unit; the dendritic unit includes a resistance value graded device, the hippocampal unit includes a resistance value mutation device, and the m dendritic units can be provided with different threshold voltage or current, respectively; and the neurons on the nth layer neuron layer are connected to the m dendritic units of the neurons on the n+1th layer neuron layer; wherein N is an integer larger than 3, m is an integer larger than 1, n is an integer larger than 1 and less than N.
    Type: Grant
    Filed: February 24, 2018
    Date of Patent: February 4, 2025
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Xinyi Li, Huaqiang Wu, He Qian, Bin Gao, Sen Song, Qingtian Zhang
  • Publication number: 20250005353
    Abstract: A data processing apparatus and a data processing method.
    Type: Application
    Filed: December 28, 2021
    Publication date: January 2, 2025
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Huaqiang WU, Ruihua YU, Peng YAO, Dabin WU, Bin GAO, Hu HE, Jianshi TANG, He QIAN
  • Patent number: 12170155
    Abstract: This application discloses a conductive paste, a preparation method thereof, and a preparation method of a conductive film using the conductive paste. The conductive paste comprises: a thermoplastic polyurethane, conductive particles, and an organic solvent, the thermoplastic polyurethane and the conductive particles being proportionally mixed in the organic solvent, and the thermoplastic polyurethane being dispersed in the form of particles among the conductive particles. A thermoplastic polyurethane elastomer is used as a binder, and the conductive particles are mixed in the organic solvent containing the thermoplastic polyurethane elastomer. The conductive particles ensure the conductivity of the conductive film prepared using the conductive paste. The thermoplastic polyurethane has strong adhesion ability, and is suitable for use on the surface of most substrates, to form a conductive film with good adhesion and no cracking.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: December 17, 2024
    Assignees: TSINGHUA UNIVERSITY, TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Jianshi Tang, Zhenxuan Zhao, Yuan Dai, Wangwei Lee, Zhengyou Zhang, Jian Yuan, Huaqiang Wu, He Qian, Bin Gao
  • Patent number: 12133478
    Abstract: A memristor and a preparation method thereof are provided. The memristor includes at least one memristive unit, each of the at least one memristive unit includes a transistor and at least one memristive component, the transistor includes a source electrode and a drain electrode; and each of the at least one memristive component includes a first electrode, a resistive layer, a second electrode, and a passivation layer, the first electrode is electrically connected with the source electrode or the drain electrode; the resistive layer is provided between the first electrode and the second electrode; and the passivation layer at least covers a sidewall of the resistive layer.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: October 29, 2024
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Huaqiang Wu, He Qian, Xinyi Li
  • Publication number: 20240335935
    Abstract: A telescopic wrench includes an outer tube, an outer sleeve, and an inner rod. The first hole of the outer sleeve ring is fitted onto the outer tube, and the second hole of the outer sleeve provides peripheral contact with the rod section of the inner rod. The outer sleeve forms an external auxiliary fitting structure with the inner rod and outer tube. The telescopic wrench provides an improvement over known structures that are prone to loosening and noise during use. The telescopic wrench enhances the structural strength when subjected to operating forces.
    Type: Application
    Filed: April 10, 2023
    Publication date: October 10, 2024
    Inventors: YI-FU CHEN, HE-QIAN CHEN
  • Publication number: 20240320083
    Abstract: A storage and computation integrated apparatus and a calibration method therefor. The storage and computation integrated apparatus includes a first processing unit, which includes: a first computation memristor array; a first calibration memristor array; and a first processing unit. The calibration method includes: determining, by means of off-chip training, a first computation weight matrix which corresponds to a first computation memristor array, and writing the first computation weight matrix into the first computation memristor array; and on the basis of the first computation memristor array where the first computation weight matrix has been written and the first computation weight matrix, performing on-chip training on a first calibration memristor array, so as to adjust a weight value of the first calibration memristor array.
    Type: Application
    Filed: December 13, 2021
    Publication date: September 26, 2024
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Bin GAO, Peng YAO, Huaqiang WU, Jianshi TANG, He QIAN
  • Patent number: 12102021
    Abstract: A semiconductor device and a manufacturing method of the semiconductor device. The semiconductor device includes: a semiconductor substrate; a bottom electrode metal layer and a top electrode metal layer located on the semiconductor substrate; a resistive layer located between the bottom electrode metal layer and the top electrode metal layer, where the transverse width of the resistive layer is greater than the transverse width of the bottom electrode metal layer and/or the top electrode metal layer, and the resistive layer has a variable resistance; an oxygen barrier layer located between the bottom electrode metal layer and the top electrode metal layer, where the oxygen barrier layer is located above the resistive layer; and an oxygen grasping layer located between the bottom electrode metal layer and the top electrode metal layer, where the transverse width of the oxygen grasping layer is less than the transverse width of the resistive layer.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: September 24, 2024
    Assignee: XIAMEN INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE CO., LTD.
    Inventors: Taiwei Chiu, Tingying Shen, He Qian
  • Patent number: 12079708
    Abstract: Disclosed are a parallel acceleration method for a memristor-based neural network, a parallel acceleration processor based on a memristor-based neural network and a parallel acceleration device based on a memristor-based neural network. The neural network includes a plurality of functional layers sequentially provided, wherein the plurality of functional layers include a first functional layer and a second functional layer following the first functional layer, the first functional layer includes a plurality of first memristor arrays in parallel, and the plurality of first memristor arrays are configured to execute an operation of the first functional layer in parallel and to output a result of the operation to the second functional layer. The parallel acceleration method includes: executing the operation of the first functional layer in parallel via the plurality of first memristor arrays and outputting the result of the operation to the second functional layer.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: September 3, 2024
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Huaqiang Wu, Peng Yao, Bin Gao, He Qian
  • Publication number: 20240217070
    Abstract: A socket includes a first section and a second section. The first section is to be connected with a tool. The second section includes an outer face, and a mounting hole is axially defined through the second section and communicates through the first section. The mounting hole includes multiple recesses and multiple sides defined in the inner periphery thereof. The multiple recesses and the multiple sides are located alternatively with each other. Each recess includes a rounded corner formed radially in the inner portion thereof. A triangular groove is formed axially and centrally in each side. The angle between two insides of each groove is smaller than 90 degrees. A rusted or damaged bolt head is engaged with either the rounded corners or the grooves so as to be effectively rotated.
    Type: Application
    Filed: January 4, 2023
    Publication date: July 4, 2024
    Inventors: Yi-Fu Chen, He-Qian Chen