Patents by Inventor Hector Flores
Hector Flores has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220358447Abstract: Systems and methods for optimizing user task schedules in a customer relationship management (CRM) platform is disclosed. In one example, a system comprising a computing device and a cache. The computing device is configured to generate child user task schedules and calculate task win probabilities of tasks for the child user task schedules using a machine learning system. The machine learning system is used to determine the plurality of task win probabilities. The computing device is also configured to calculate total task win probabilities for the child user task schedules based on the task win probabilities and is configured to determine an optimized user task schedule by selecting a respective user task schedule having a greatest total task win probability from a subset of the plurality of child user task schedules stored in the distributed cache.Type: ApplicationFiled: July 22, 2022Publication date: November 10, 2022Inventors: Hector Flores, Abhishek Jain, Robin Jain, Yogaraj Jayaprakasam, Srinivas K. Kumandan, Jordan Meyerowitz
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Patent number: 11416791Abstract: Systems and methods for optimizing user task schedules in a customer relationship management (CRM) platform is disclosed. The system may optimally input tasks into time slots in a user schedule to generate the optimized user task schedule. The system may generate a plurality of user task schedules and calculate a total task win probability for each of the user task schedules. The system may comprise the total task win probabilities and select the user task schedule having the greatest total task win probability. The system may also perform a genetic processing analysis of the user task schedules to further optimize task placement in the user task schedule.Type: GrantFiled: February 22, 2019Date of Patent: August 16, 2022Assignee: American Express Travel Related Services, Inc.Inventors: Hector Flores, Abhishek Jain, Robin Jain, Yogaraj Jayaprakasam, Srinivas K. Kumandan, Jordan Meyerowitz
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Publication number: 20200272978Abstract: Systems and methods for optimizing user task schedules in a customer relationship management (CRM) platform is disclosed. The system may optimally input tasks into time slots in a user schedule to generate the optimized user task schedule. The system may generate a plurality of user task schedules and calculate a total task win probability for each of the user task schedules. The system may comprise the total task win probabilities and select the user task schedule having the greatest total task win probability. The system may also perform a genetic processing analysis of the user task schedules to further optimize task placement in the user task schedule.Type: ApplicationFiled: February 22, 2019Publication date: August 27, 2020Applicant: American Express Travel Related Services Company, Inc.Inventors: HECTOR FLORES, ABHISHEK JAIN, ROBIN JAIN, YOGARAJ JAYAPRAKASAM, SRINIVAS K. KUMANDAN, JORDAN MEYEROWITZ
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Publication number: 20070275142Abstract: A method for at least partially dehydrating the casing of co-extruded food products, wherein an aqueous salt solution is supplied to the exterior of the co-extruded food products. A device for at least partially dehydrating the casing of co-extruded food products.Type: ApplicationFiled: March 7, 2005Publication date: November 29, 2007Applicant: Stork Townsend B.V.Inventors: Jos Kobussen, Marcus Bernhard Bontjer, Kasper Van Den Berg, Hector Flores
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Publication number: 20070241868Abstract: An improved tractor-trailer communications and tracking system retrofitting assembly, comprising an insulated wire, a flexible wire sleeve, a sealed fuse box, a male connector and a female connector is disclosed. The insulated wire has a length sufficient to at least span the distance between the rear portion of a tractor cab or sleeper box and the power line carrier filter. A first end of the insulated wire terminates in first and second wire segments of roughly equal length. The end portion of the first wire segment has a two-way female connector electrically attached thereto and the second wire segment has a two-way male connector electrically attached thereto. A third wire segment is electrically attached to the female two-way connector at a first end and to the male two-way connector at a second end.Type: ApplicationFiled: April 12, 2006Publication date: October 18, 2007Applicant: SWIFT TRANSPORTATION CO., INC.Inventors: Elden Fackrell, Hector Flores
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Publication number: 20020115401Abstract: A system for conveying and collating a crimped line of sausage has an elongated vibratory conveyor deck powered to oscillate on a supporting frame. A tray having a bottom and upright sides on a tray mounted on the vibrating conveyor will absorb the oscillations of the conveyor. A plurality of elongated channels extend longitudinally on the upper surface of the tray from the intake end to the exit end, whereupon the elongated line of crimped sausages deposited on the intake end of the tray in the form of sausage line segments or individual links will progressively move into the channels of the tray and will progressively move towards the exit end of the tray with the links and the line of sausage segments being aligned in parallel fashion.Type: ApplicationFiled: February 21, 2001Publication date: August 22, 2002Inventors: Mart Kobussen, Jos Kobussen, David Alexander, Hector Flores
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Patent number: 6121119Abstract: The fabrication of a resistor structure is described. A resistive region is formed over the top of a substrate. Trenches are formed from the top side of the substrate in scribe line regions where the wafer is to be separated to form resistor modules. Contact layers are formed over the top side of the substrate and are electrically coupled to each end of the resistive region, respectively. The contact layers are also formed over the sidewalls of the trenches. The wafer is separated through the trenches, creating resistor modules having sidewall contact regions.Type: GrantFiled: May 29, 1997Date of Patent: September 19, 2000Assignee: Chipscale, Inc.Inventors: John G. Richards, Hector Flores
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Patent number: 5789817Abstract: An electrical apparatus having a first substrate, a first metallic layer, a semiconductor device, a second metallic layer, and a metallic interconnecting structure is described. The first substrate is of a semiconductor material and has an upper region and a lower region. The substrate provides an electrical path between the upper region and the lower region. The first metallic layer is coupled to the lower region of the substrate. The first metallic layer provides a first external electrical connection. The semiconductor device has an upper region and a lower region. The second metallic layer is coupled to the lower region of the semiconductor device. The second metallic layer provides a second external electrical connection. The metallic interconnecting structure electrically couples the upper region of the first substrate to the upper region of the semiconductor device. A bridge apparatus is also described. In addition, a method of fabricating an electrical apparatus is described.Type: GrantFiled: November 15, 1996Date of Patent: August 4, 1998Assignee: Chipscale, Inc.Inventors: John Gareth Richards, Hector Flores, Wendell B. Sander
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Patent number: 5656547Abstract: A flange interface for wrap-around contact regions formed in fabricating semiconductor devices provides for a durable and reliable electrical bond. A first layer having a first material is formed over the first side of a wafer. A trench is formed from the second side of the wafer such that a portion of the first layer becomes exposed in the trench. A second layer having a second material is formed over the second side of the wafer such that a portion of the second layer contacts the portion of the first layer exposed in the trench. The wafer is separated through the trench. The trench may be formed by sawing the second side of the wafer in an area where the trench is to be formed. The wafer may then be etched such that the trench is formed.Type: GrantFiled: May 11, 1994Date of Patent: August 12, 1997Assignee: ChipScale, Inc.Inventors: John G. Richards, Wendell B. Sander, Donald P. Richmond, II, Hector Flores
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Patent number: 5592022Abstract: An electrical apparatus having a top and a bottom is described. A right side portion comprised of a first substrate of semiconductor material is provided. A left side portion of a second substrate of semiconductor material comprising an integrated circuit is provided. A middle portion between the right side portion and the left side portion is provided. The middle portion is comprised of an insulative coating. A metallic interconnecting structure is provided that electrically couples the first substrate of the right side portion to the integrated circuit of the left side portion. The metallic interconnecting structure extends over the insulative material of the middle portion. A top portion comprised of the insulative material is provided that covers the integrated circuit, the metallic interconnecting structure, the left side portion, the right side portion, and the middle portion. The top portion and the middle portion sandwich the metallic interconnecting structure.Type: GrantFiled: July 5, 1994Date of Patent: January 7, 1997Assignee: ChipScale, Inc.Inventors: John G. Richards, Hector Flores, Wendell B. Sander
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Patent number: 5557149Abstract: A flange interface for wrap-around contact regions formed in fabricating semiconductor devices provides for a durable and reliable electrical bond. A first layer having a first material is formed over the first side of a wafer. A trench is formed from the second side of the wafer such that a portion of the first layer becomes exposed in the trench. A second layer having a second material is formed over the second side of the wafer such that a portion of the second layer contacts the portion of the first layer exposed in the trench. The wafer is separated through the trench. The trench may be formed by sawing the second side of the wafer in an area where the trench is to be formed. The wafer may then be etched such that the trench is formed.Type: GrantFiled: March 24, 1995Date of Patent: September 17, 1996Assignee: ChipScale, Inc.Inventors: John G. Richards, Wendell B. Sander, Donald P. Richmond, II, Hector Flores
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Patent number: 5521420Abstract: An electrical apparatus having a top and a bottom is described. A right side portion comprised of a first substrate of semiconductor material is provided. A left side portion of a second substrate of semiconductor material comprising an integrated circuit is provided. A middle portion between the right side portion and the left side portion is provided. The middle portion is comprised of an insulative coating. A metallic interconnecting structure is provided that electrically couples the first substrate of the right side portion to the integrated circuit of the left side portion. The metallic interconnecting structure extends over the insulative material of the middle portion. A top portion comprised of the insulative material is provided that covers the integrated circuit, the metallic interconnecting structure, the left side portion, the right side portion, and the middle portion. The top portion and the middle portion sandwich the metallic interconnecting structure.Type: GrantFiled: July 5, 1994Date of Patent: May 28, 1996Assignee: Micro Technology PartnersInventors: John G. Richards, Hector Flores, Wendell B. Sander
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Patent number: 5455187Abstract: An electrical apparatus having a first substrate, a first metallic layer, a semiconductor device, a second metallic layer, and a metallic interconnecting structure is described. The first substrate is of a semiconductor material and has an upper region and a lower region. The substrate provides an electrical path between the upper region and the lower region. The first metallic layer is coupled to the lower region of the substrate. The first metallic layer provides a first external electrical connection. The semiconductor device has an upper region and a lower region. The second metallic layer is coupled to the lower region of the semiconductor device. The second metallic layer provides a second external electrical connection. The metallic interconnecting structure electrically couples the upper region of the first substrate to the upper region of the semiconductor device. A bridge apparatus is also described. In addition, a method of fabricating an electrical apparatus is described.Type: GrantFiled: November 1, 1994Date of Patent: October 3, 1995Assignee: Micro Technology PartnersInventors: John G. Richards, Hector Flores
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Patent number: 5444009Abstract: An electrical apparatus having a top and a bottom is described. A right side portion comprised of a first substrate of semiconductor material is provided. A left side portion of a second substrate of semiconductor material comprising an integrated circuit is provided. A middle portion between the right side portion and the left side portion is provided. The middle portion is comprised of an insulative coating. A metallic interconnecting structure is provided that electrically couples the first substrate of the right side portion to the integrated circuit of the left side portion. The metallic interconnecting structure extends over the insulative material of the middle portion. A top portion comprised of the insulative material is provided that covers the integrated circuit, the metallic interconnecting structure, the left side portion, the right side portion, and the middle portion. The top portion and the middle portion sandwich the metallic interconnecting structure.Type: GrantFiled: December 23, 1994Date of Patent: August 22, 1995Assignee: Micro Technology PartnersInventors: John G. Richards, Hector Flores, Wendell B. Sander
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Patent number: 5441898Abstract: An electrical apparatus having a top and a bottom is described. A right side portion comprised of a first substrate of semiconductor material is provided. A left side portion of a second substrate of semiconductor material comprising an integrated circuit is provided. A middle portion between the right side portion and the left side portion is provided. The middle portion is comprised of an insulative coating. A metallic interconnecting structure is provided that electrically couples the first substrate of the right side portion to the integrated circuit of the left side portion. The metallic interconnecting structure extends over the insulative material of the middle portion. A top portion comprised of the insulative material is provided that covers the integrated circuit, the metallic interconnecting structure, the left side portion, the right side portion, and the middle portion. The top portion and the middle portion sandwich the metallic interconnecting structure.Type: GrantFiled: December 29, 1994Date of Patent: August 15, 1995Assignee: Micro Technology PartnersInventors: John G. Richards, Hector Flores, Wendell B. Sander
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Patent number: 5403729Abstract: An electrical apparatus having a top and a bottom is described. A right side portion comprised of a first substrate of semiconductor material is provided. A left side portion of a second substrate of semiconductor material comprising an integrated circuit is provided. A middle portion between the right side portion and the left side portion is provided. The middle portion is comprised of an insulative coating. A metallic interconnecting structure is provided that electrically couples the first substrate of the right side portion to the integrated circuit of the left side portion. The metallic interconnecting structure extends over the insulative material of the middle portion. A top portion comprised of the insulative material is provided that covers the integrated circuit, the metallic interconnecting structure, the left side portion, the right side portion, and the middle portion. The top portion and the middle portion sandwich the metallic interconnecting structure.Type: GrantFiled: May 27, 1992Date of Patent: April 4, 1995Assignee: Micro Technology PartnersInventors: John G. Richards, Hector Flores, Wendell B. Sander
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Patent number: 5280194Abstract: An electrical apparatus having a first substrate, a first metallic layer, a semiconductor device, a second metallic layer, and a metallic interconnecting structure is described. The first substrate is of a semiconductor material and has an upper region and a lower region. The substrate provides an electrical path between the upper region and the lower region. The first metallic layer is coupled to the lower region of the substrate. The first metallic layer provides a first external electrical connection. The semiconductor device has an upper region and a lower region. The second metallic layer is coupled to the lower region of the semiconductor device. The second metallic layer provides a second external electrical connection. The metallic interconnecting structure electrically couples the upper region of the first substrate to the upper region of the semiconductor device. A bridge apparatus is also described. In addition, a method of fabricating an electrical apparatus is described.Type: GrantFiled: September 4, 1992Date of Patent: January 18, 1994Assignee: Micro Technology PartnersInventors: John G. Richards, Hector Flores, Wendell B. Sander