Abstract: The present invention provides a data processing apparatus comprising: a plurality of registers for storing data items to be processed; a processor for processing instructions to be applied to data items stored in said plurality of registers; and register remapping logic for converting a logical register reference within a preselected set of instructions to a physical register reference identifying the register containing the data item required for processing by the processor.By this approach, a remapping instruction need only be executed once in order for the remapping to be applied to a desired number of instructions. This is in contrast to prior art techniques, where subsequent to a remapping instruction being executed, the remapping is applied to all subsequent instructions, ie. a desired number of instructions cannot be selected.The invention is particularly advantageously employed in apparatus arranged to repeat an instruction loop, the instruction loop including said preselected set of instructions.