Patents by Inventor Hee Byun

Hee Byun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070280019
    Abstract: An apparatus for controlling an activation period of a word line of a volatile memory device is disclosed. The apparatus adjusts the activation period of the word line using a member for adjusting a pulse width of a pulse signal that activates the word line according to an operation mode of the volatile memory device.
    Type: Application
    Filed: June 26, 2007
    Publication date: December 6, 2007
    Inventor: Hee BYUN
  • Publication number: 20070070751
    Abstract: A bit line sense amplifier control circuit comprises a driving signal generating unit adapted and configured to generate first through third driving signals in response to a bit line sense amplifier enable signal and an overdrive enable signal for setting an overdrive period, and to disable a first driving signal which is enabled for an overdrive period in response to a refresh signal which is enabled at a refresh mode, and a bit line sense amplifier control signal generating unit adapted and configured to generate first and second bit line sense amplifier control signals in response to the first through third driving signals. As a result, an overdrive pulse is not generated at a refresh mode to remove an overdriving period, thereby reducing current consumption at a refresh mode.
    Type: Application
    Filed: November 28, 2006
    Publication date: March 29, 2007
    Applicant: Hynix Semiconductor Inc.
    Inventor: Hee Byun
  • Publication number: 20060171216
    Abstract: An apparatus for controlling an activation period of a word line of a volatile memory device is disclosed. The apparatus adjusts the activation period of the word line using a member for adjusting a pulse width of a pulse signal that activates the word line according to an operation mode of the volatile memory device.
    Type: Application
    Filed: April 21, 2005
    Publication date: August 3, 2006
    Inventor: Hee Byun
  • Publication number: 20060044904
    Abstract: A bit line sense amplifier control circuit comprises a driving signal generating unit adapted and configured to generate first through third driving signals in response to a bit line sense amplifier enable signal and an overdrive enable signal for setting an overdrive period, and to disable a first driving signal which is enabled for an overdrive period in response to a refresh signal which is enabled at a refresh mode, and a bit line sense amplifier control signal generating unit adapted and configured to generate first and second bit line sense amplifier control signals in response to the first through third driving signals. As a result, an overdrive pulse is not generated at a refresh mode to remove an overdriving period, thereby reducing current consumption at a refresh mode.
    Type: Application
    Filed: June 15, 2005
    Publication date: March 2, 2006
    Applicant: Hynix Semiconductor Inc.
    Inventor: Hee Byun