Abstract: A data driver includes a first signal generating circuit for externally producing a start signal; a second signal generating circuit for externally producing a first clock signal; a third signal generating circuit for externally producing a load signal; a generator externally generating a source video signal having a frequency; and a single integrated circuit including: an m-bit register circuit for receiving the start signal corresponding to the first clock signal and outputting a latch clock signal, where m is an integer; a data latch circuit for latching and outputting at least two sets of three video signals corresponding to the source video signal, the data latch circuit receiving all of the video signals simultaneously, each of the video signals having n-bits of data, where n is an integer; a line latch circuit for latching the video signals from the data latch circuit corresponding to the latch clock signal from the shift register, the line latch circuit storing and outputting the video signal accordin