Abstract: A method of manufacturing a thin film transistor array panel including forming a gate line on a substrate, forming a gate insulating layer on the gate line, forming a semiconductor layer on the gate insulating layer, forming a data line and a drain electrode on the semiconductor layer, depositing a passivation layer on the data line and the drain electrode, forming a photoresist including a first portion and a second portion, which is thinner than the first portion, on the passivation layer, etching the passivation layer using the photoresist as a mask to expose a portion of the drain electrode, removing the second portion of the photoresist, depositing a conductive film, and removing the first portion of the photoresist to form a pixel electrode on the exposed portion of the drain electrode.

Abstract: A gate wire including a gate line and a gate electrode is formed on a substrate and a gate insulating layer is formed on the substrate. A semiconductor pattern and an etching assistant pattern are formed on the gate insulating layer and a source/drain conductor pattern and an etching assistant layer are formed on the semiconductor pattern and the etching assistant pattern. A data wire including a data line and source and drain electrodes separated from each other is formed by removing the etching assistant layer and partly removing the source/drain conductor pattern. A pixel electrode connected to the drain electrodes is formed.

Abstract: A thin film transistor array panel is provided, which includes a gate line, a data line intersecting the gate line, a storage electrode apart from the gate and data lines, a thin film transistor connected to the gate and data lines and having a drain electrode, a pixel electrode connected to the drain electrode, a first insulating layer over the thin film transistor and disposed under the pixel electrode, and a second insulating layer disposed on the first insulating layer and having an opening exposing the first insulating layer on the storage electrode.

Abstract: A method of manufacturing a thin film transistor array panel is provided, The method includes: forming a gate line on a substrate; forming a gate insulating layer on the gate line; forming a semiconductor layer on the gate insulating layer; forming a data line and a drain electrode on the semiconductor layer; depositing a passivation layer on the data line and the drain electrode; forming a photoresist including a first portion and a second portion thinner than the first portion on the passivation layer; etching the passivation layer using the photoresist as a mask to expose a portion of the drain electrode at least in part; removing the second portion of the photoresist; depositing a conductive film; and removing the photoresist to form a pixel electrode on the exposed portion of the drain electrode.

Abstract: Disclosed are a thin film transistor substrate of an LCD device and a method of manufacturing the same. The thin film transistor substrate includes a nickel-silicide layer formed on an insulating layer pattern including silicon and a metal layer formed on the nickel-silicide layer. Nickel is coated on the insulating layer pattern including silicon and a metal material is coated on the nickel-coated layer. After that, a heat treatment is performed at about 200 to about 350° C. to obtain the nickel-silicide layer. Since the thin film transistor substrate of the LCD device is manufactured by applying the nickel-silicide wiring, a device having low resistivity and good ohmic contact property can be obtained.

Abstract: The present invention relates to a plasma apparatus comprising a reaction chamber having a reaction space which accommodates a substrate to be treated; a coil located on the outside of the reaction space; a power source applying alternating frequency power on the coil; and a conducting plate located between the coil and the reaction space and generating an induced current from the alternating frequency power applied on the coil. Thus, the present invention provides a plasma apparatus that induces a uniform electric field in an internal gas of the reaction chamber.

Abstract: A method for manufacturing a TFT array panel including forming a gate line having a gate electrode on a insulating layer, a gate insulating layer on the gate line, a semiconductor on the gate insulating layer, an ohmic contact on the semiconductor, a data line having a source electrode and a drain electrode apart form the source electrode on the ohmic contact, a passivation layer having a contact hole to expose the drain electrode, and a pixel electrode connected to the drain electrode through the contact hole. The drain electrode and the source electrode are formed by a photolithography using a negative photoresist pattern. The negative photoresist pattern includes a first portion having a first thickness corresponding to a channel area, a second portion having a second thickness corresponding to a data line area, and a third portion having a third thickness corresponding to another area.

Abstract: A thin film transistor includes a gate electrode on a substrate, a gate insulating layer on the substrate, a channel pattern, a source electrode and a drain electrode. The channel pattern includes a semiconductor pattern formed on the gate electrode and overlaying the gate electrode as well as first and second conductive adhesive patterns formed on the semiconductor pattern and spaced apart from each other. The source electrode includes a first barrier pattern, a source pattern and a first capping pattern sequentially formed on the first conductive adhesive pattern. The drain electrode includes a second barrier pattern, a drain pattern and a second capping pattern sequentially formed on the second conductive adhesive pattern. Etched portions of the first and second conductive adhesive patterns have a substantially vertical profile to prevent the exposure of the source and drain electrodes, thereby improving the characteristics of the thin film transistor.

Abstract: An organic light emitting diode display including a light emitting element, a first conductive line, a second conductive line, and a third conductive line separated from one another, and a first thin film transistor coupled to the third conductive line and the light emitting element and a second thin film transistor coupled to the first conductive line and the second conductive line. A third thin film transistor includes a first electrode and a fourth thin film transistor includes a second electrode, and the first electrode and the second electrode are coupled to each other through a first contact hole in a first insulating layer.

Abstract: Disclosed is an organic electroluminescent (EL) device for enhancing the luminous efficiency. A first electrode is formed on a substrate. A CVD insulating film of low dielectric constant having an opening exposing the first electrode is formed on the first electrode and the substrate. An organic EL layer and a second electrode are sequentially stacked on the opening. A wall surrounding a region of the organic EL layer is formed of the CVD insulating film of low dielectric constant, the surface treatment of the pixel electrode can be performed using O2 plasma to thereby enhance luminance properties.

Abstract: A method of manufacturing a thin film transistor array panel including forming a gate line on a substrate, forming a gate insulating layer on the gate line, forming a semiconductor layer on the gate insulating layer, forming a data line and a drain electrode on the semiconductor layer, depositing a passivation layer on the data line and the drain electrode, forming a photoresist including a first portion and a second portion, which is thinner than the first portion, on the passivation layer, etching the passivation layer using the photoresist as a mask to expose a portion of the drain electrode, removing the second portion of the photoresist, depositing a conductive film, and removing the first portion of the photoresist to form a pixel electrode on the exposed portion of the drain electrode.

Abstract: An apparatus of conveying a substrate for an LCD having a size of 1500 mm×1800 mm or more, comprises a pair of parallel supporting arms being shaped like a bar and supporting opposite edge areas of the substrate; and at least one auxiliary arm disposed between the supporting arms. With this configuration, the present invention provides a conveying apparatus which minimizes deformation of a large-sized substrate for an LCD while conveying the substrate, thereby preventing a defective due to the deformation and stabilizing a manufacturing process.

Abstract: First, a Cr film and a CrOx film are deposited and patterned using an etchant including 8-12% Ce(NH4)2(NO3)6, 10-20% NH3 and remaining ultra pure water to form a gate wire including a plurality of gate lines, a plurality of gate electrodes and a plurality of gate pads. Next, a gate insulating film, a semiconductor layer and an ohmic contact layer are formed in sequence. A Cr film and CrOx film are deposited in sequence and patterned using an etchant including 8-12% Ce(N114)2(NO3)6, 10-20% NH3 and remaining ultra pure water to form a data wire including a plurality of data lines, a plurality of source electrodes, a plurality of drain electrodes and a plurality of data pads. A passivation layer is deposited and pattered to form a plurality of contact holes respectively exposing the drain electrodes, the gate pads and the data pads.

Abstract: A plasma etcher is provided, which includes: a chamber; top and bottom plasma electrodes provided top and bottom positions of the chamber; a gas injection pipe connected to the chamber; a plurality of diffusion plates provided between the top plasma electrode and the gate injection pipe; and a power generator supplying a plasma voltage to the top and bottom electrodes, wherein the top plasma electrode has a plurality of primary injection holes and the diffusion plates have a plurality of secondary injection holes.

Abstract: A cleaning apparatus and method are provided for the removal of contaminants from semiconductor processing equipment. An electrode to generate a cleaning plasma is provided within a processing chamber and a guide system is capable of moving the electrode over contaminated areas. Advantageously, the present invention saves cleaning time compared with a conventional cleaning method that requires the opening and cleaning of the chamber and also allows for increasing the interval between regular cleanings.

Abstract: A method of manufacturing a thin film array panel is provided, which includes: forming a gate line formed on a substrate; forming a gate insulating layer on the gate line; forming a semiconductor layer on the gate insulating layer; forming an ohmic contact layer on the semiconductor layer; forming a data line and a drain electrode disposed at least on the ohmic contact layer; forming an oxide on the data line; etching the ohmic contact layer using the data line and the drain electrode as an etch mask; and forming a pixel electrode connected to the drain electrode.

Abstract: A plasma chamber comprising a lower electrode and an upper electrode, and used for dry-etching an LCD, comprises a main power supply comprising a main power source to generate a main voltage having a predetermined main frequency, and a first impedance matching circuit to impedance-match the main voltage; a bias power supply comprising a bias power source to generate a bias voltage having a predetermined bias frequency, and a second impedance matching circuit to impedance-match the bias voltage; and a mixer connected to both the first impedance matching circuit and the second impedance matching circuit, receiving and mixing the main voltage and the bias voltage, and outputting the mixed voltage to one of the lower electrode and the upper electrode. With this configuration, the present invention provides a plasma chamber in which etching conditions such as an etching rate, an etching profile, a selection ratio, etc. are precisely adjusted.