Patents by Inventor Hee-Il Hong

Hee-Il Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device capable of being tested after packaging
    Patent number: 8675432
    Abstract: Provided is a semiconductor device capable of effectively testing whether memory cells and a memory cell array are defective. The semiconductor device may include a memory cell array having a plurality of memory cells and an external test pad connected to an internal test pad. A test voltage may be applied to the plurality of word lines connected to the plurality of memory cells via the external test pad and the internal test pad in a test mode, wherein the test voltage disables the plurality of word lines.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: March 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee-Il Hong, Kang-Young Cho
  • SEMICONDUCTOR DEVICE CAPABLE OF BEING TESTED AFTER PACKAGING
    Publication number: 20120187977
    Abstract: Provided is a semiconductor device capable of effectively testing whether memory cells and a memory cell array are defective. The semiconductor device may include a memory cell array having a plurality of memory cells and an external test pad connected to an internal test pad. A test voltage may be applied to the plurality of word lines connected to the plurality of memory cells via the external test pad and the internal test pad in a test mode, wherein the test voltage disables the plurality of word lines.
    Type: Application
    Filed: April 2, 2012
    Publication date: July 26, 2012
    Inventors: Hee-Il Hong, Kang-Young Cho
  • Semiconductor device capable of being tested after packaging
    Patent number: 8149637
    Abstract: Provided is a semiconductor device capable of effectively testing whether memory cells and a memory cell array are defective. The semiconductor device may include a memory cell array having a plurality of memory cells and an external test pad connected to an internal test pad. A test voltage may be applied to the plurality of word lines connected to the plurality of memory cells via the external test pad and the internal test pad in a test mode, wherein the test voltage disables the plurality of word lines.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: April 3, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee-Il Hong, Kang-Young Cho
  • SEMICONDUCTOR DEVICE
    Publication number: 20100296353
    Abstract: Provided is a semiconductor device capable of effectively testing whether memory cells and a memory cell array are defective. The semiconductor device may include a memory cell array having a plurality of memory cells and an external test pad connected to an internal test pad. A test voltage may be applied to the plurality of word lines connected to the plurality of memory cells via the external test pad and the internal test pad in a test mode, wherein the test voltage disables the plurality of word lines.
    Type: Application
    Filed: February 2, 2010
    Publication date: November 25, 2010
    Inventors: Hee-Il Hong, Kang-Young Cho