Patents by Inventor Hee-Kwan Son

Hee-Kwan Son has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7853013
    Abstract: A method and system for encrypting input data may include receiving an input point and a randomness rate and generating a random selection value and a random position value from the randomness rate. At least one of the input point and points encrypted by performing elliptic curve (EC) operation over a plurality of rounds may be randomly selected based on the randomness rate and the random position value. The selected point may be converted to a point representation directed by the random selection value. A finally encrypted output point may be generated by performing the EC operation over a plurality of rounds based on the input point and a secret key.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: December 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ihor Vasyltsov, Hee-kwan Son, Yoo-jin Baek
  • Patent number: 7805478
    Abstract: In a Montgomery multiplier, a modulus product generator may select a modulus product from a plurality of selectable n-bit modulus numbers M, a given modulus number M being formed from a currently input extended chunk of bits among the n-bit modulus numbers. A partial product generator may select a multiplicand number from a plurality of selectable n-bit multiplicands A as a partial product, a given multiplicand A being formed from a currently input extended chunk of bits among the n-bit multiplicands. An accumulator may accumulate the selected modulus product and partial product to generate a multiplication result. The Montgomery multiplier may be part of an operation unit that may include a memory and host, and may be adapted to perform a Montgomery multiplication operation and a normal multiplication operation based on a logic state of a control signal input thereto.
    Type: Grant
    Filed: March 1, 2005
    Date of Patent: September 28, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hee-Kwan Son
  • Patent number: 7552163
    Abstract: A method for power reduction and increasing computation speed for a Montgomery modulus multiplication module for performing modulus multiplication. A coding scheme reduces the hamming distance for partial product and multiple modulus selection, reducing MUX operations and power consumption. Synchronization registers synchronize partial product and multiple modulus values input to an accumulator reducing glitch and/or increase computation speed. Registers provide storage of previous values and reduce the need to obtain the values from a MUX, reducing MUX operations and/or reducing power consumption.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: June 23, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hee Kwan Son
  • Patent number: 7543011
    Abstract: A method of reducing power consumption and/or enhancing computation speed in the modulus multiplication operation of a Montgomery modulus multiplication module. A coding scheme reduces the need for an adder or memory element for obtaining multiple modulus values, and the use of carry save addition with carry propagation addition enhances the computational speed of the multiplication module.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: June 2, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joong-Chul Yoon, Hee-Kwan Son
  • Patent number: 7412474
    Abstract: A Montgomery modular multiplier receiving a multiplicand (A), a modulus (M), and a multiplier (B), using a t-s compressor, where t>3 and s>1, and a multiplication method performed in the same. In response to a carry propagation adder signal, the t-s compressor performs additions on the carry C and the sum S and obtains the final results in a carry propagation adder structure.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: August 12, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hee-Kwan Son
  • Publication number: 20060280296
    Abstract: A method and system for encrypting input data may include receiving an input point and a randomness rate and generating a random selection value and a random position value from the randomness rate. At least one of the input point and points encrypted by performing elliptic curve (EC) operation over a plurality of rounds may be randomly selected based on the randomness rate and the random position value. The selected point may be converted to a point representation directed by the random selection value. A finally encrypted output point may be generated by performing the EC operation over a plurality of rounds based on the input point and a secret key.
    Type: Application
    Filed: May 11, 2006
    Publication date: December 14, 2006
    Inventors: Ihor Vasyltsov, Hee-kwan Son, Yoo-jin Baek
  • Publication number: 20060274894
    Abstract: Provided are example embodiments of a cryptographic method and apparatus thereof. The cryptographic method and apparatus may be implemented in Weierstrass and Hessian forms, and for the point representations, Affine, Ordinary Projective, Jacobian Projective, and Lopez-Dahab Projective. The cryptographic method and apparatus may prevent confidential information from leakage by checking faults in a basic point due to certain attacks, faults in definition fields, and faults in elliptic curve (EC parameters before outputting final cryptographic results.
    Type: Application
    Filed: March 6, 2006
    Publication date: December 7, 2006
    Inventors: Ihor Vasyltsov, Yoo-Jin Baek, Hee-Kwan Son
  • Publication number: 20060023878
    Abstract: A segmentable modular multiplier circuit includes a control circuit configured to produce a mode control signal and operation control signals in response to a control signal and a calculator circuit configured to perform modular multiply operations on first and second bit length operands in respective first and second modes responsive to the mode control signal and the operation control signals. The control circuit may include a host interface unit configured to produce an operation information signal in response to a control data signal received from a host and a controller configured to produce the mode control signal and the operation control signals in response to the operation information signal.
    Type: Application
    Filed: July 28, 2005
    Publication date: February 2, 2006
    Inventor: Hee-kwan Son
  • Publication number: 20050198093
    Abstract: In a Montgomery multiplier, a modulus product generator may select a modulus product from a plurality of selectable n-bit modulus numbers M, a given modulus number M being formed from a currently input extended chunk of bits among the n-bit modulus numbers. A partial product generator may select a multiplicand number from a plurality of selectable n-bit multiplicands A as a partial product, a given multiplicand A being formed from a currently input extended chunk of bits among the n-bit multiplicands. An accumulator may accumulate the selected modulus product and partial product to generate a multiplication result. The Montgomery multiplier may be part of an operation unit that may include a memory and host, and may be adapted to perform a Montgomery multiplication operation and a normal multiplication operation based on a logic state of a control signal input thereto.
    Type: Application
    Filed: March 1, 2005
    Publication date: September 8, 2005
    Inventor: Hee-Kwan Son
  • Publication number: 20040252829
    Abstract: A method for power reduction and increasing computation speed for a Montgomery modulus multiplication module for performing a modulus multiplication. A coding scheme reduces the need for an adder or memory element for obtaining multiple modulus values, and the use of carry save addition with carry propagation addition increases the computational speed of the multiplication module.
    Type: Application
    Filed: December 17, 2003
    Publication date: December 16, 2004
    Inventor: Hee-Kwan Son
  • Publication number: 20040225702
    Abstract: A method for power reduction and increasing computation speed for a Montgomery modulus multiplication module for performing modulus multiplication. A coding scheme reduces the hamming distance for partial product and multiple modulus selection, reducing MUX operations and power consumption. Synchronization registers synchronize partial product and multiple modulus values input to an accumulator reducing glitch and/or increase computation speed. Registers provide storage of previous values and reduce the need to obtain the values from a MUX, reducing MUX operations and/or reducing power consumption.
    Type: Application
    Filed: December 17, 2003
    Publication date: November 11, 2004
    Inventor: Hee-Kwan Son
  • Publication number: 20040215686
    Abstract: A method of reducing power consumption and/or enhancing computation speed in the modulus multiplication operation of a Montgomery modulus multiplication module. A coding scheme reduces the need for an adder or memory element for obtaining multiple modulus values, and the use of carry save addition with carry propagation addition enhances the computational speed of the multiplication module.
    Type: Application
    Filed: April 23, 2004
    Publication date: October 28, 2004
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joong-Chul Yoon, Hee-Kwan Son
  • Publication number: 20040125948
    Abstract: A Montgomery modular multiplier receiving a multiplicand (A), a modulus (M), and a multiplier (B), using a t-s compressor, where t>3 and s>1, and a multiplication method performed in the same. In response to a carry propagation adder signal, the t-s compressor performs additions on the carry C and the sum Sand obtains the final results in a carry propagation adder structure.
    Type: Application
    Filed: September 12, 2003
    Publication date: July 1, 2004
    Inventor: Hee-Kwan Son