Abstract: A CMOS image sensor and a method for fabricating the same are disclosed, in which a dead zone and a dark current are simultaneously reduced by selective epitaxial growth. The CMOS image sensor includes a first conductive type semiconductor substrate, a second conductive type impurity ion area, a gate electrode, an insulating film formed on an entire surface of the semiconductor substrate including the gate electrode and excluding the second conductive type impurity ion area, and a silicon epitaxial layer formed on the second conductive type impurity ion area and doped with first conductive type impurity ions.

Abstract: A CMOS image sensor and a method for fabricating the same are disclosed, in which an impurity ion area is formed in a semiconductor substrate to form a transfer path for optical charges. Dead zone and dark current characteristics are thereby simultaneously improved. The CMOS image sensor includes a first conductive type semiconductor substrate, a device isolation film, a gate electrode, a second conductive type first impurity ion area and a first conductive type first impurity ion area formed with a deposition structure in the semiconductor substrate below the gate electrode, a second conductive type second impurity ion area, and a first conductive type second impurity ion area formed on a surface of the second conductive type second impurity ion area.

Abstract: A CMOS image sensor includes a semiconductor substrate with a first conductive type including a photodiode region and a transistor region, a gate electrode formed on the transistor region of the substrate, a first impurity region with a second conductive type formed in a portion of the semiconductor substrate between the photodiode region and the gate electrode, and a second impurity region with the second conductive type formed in the photodiode region of the semiconductor substrate.

Abstract: A CMOS image sensor and a method for fabricating the same are disclosed, in which a dead zone and a dark current are simultaneously reduced by selective epitaxial growth. The CMOS image sensor includes a first conductive type semiconductor substrate, a second conductive type impurity ion area, a gate electrode, an insulating film formed on an entire surface of the semiconductor substrate including the gate electrode and excluding the second conductive type impurity ion area, and a silicon epitaxial layer formed on the second conductive type impurity ion area and doped with first conductive type impurity ions.

Abstract: A CMOS image sensor includes a first conductive type semiconductor substrate defined by a photodiode area and a transistor area, a trench formed in the semiconductor substrate corresponding to a transfer transistor of the transistor area, a gate electrode of the transfer transistor, formed in the trench, a second conductive type impurity ion area formed in the semiconductor substrate of the photodiode area, and a first conductive type impurity ion area formed on a surface of the second conductive type impurity ion area.

Abstract: A method of fabricating a CMOS image sensor can minimize a dark current by avoiding a dry etch process of a photodiode surface. The method can also reduce a contact resistance and variation of the contact resistance of a read-out circuit unit within a unit pixel. The method includes steps of forming an insulating layer on a semiconductor substrate divided into a photodiode area and a transistor area, removing the insulating layer on a gate electrode forming area, forming a gate insulating layer, forming a conductive layer, forming a gate electrode by planarizing the conductive layer, selectively removing the insulating layer to expose the semiconductor substrate, forming a lightly doped impurity region in the exposed semiconductor substrate, forming a spacer on a sidewall of the gate electrode, completely removing the insulating layer, and forming a heavily doped impurity region on the transistor area of the semiconductor substrate.

Abstract: A CMOS image sensor and fabricating method thereof are disclosed, by which a dark current can be reduced. The present invention includes a first conductive type semiconductor substrate divided into an active area and a field area, an STI layer formed in the field area to divide the first conductive type semiconductor substrate into active area and the field area, a second conductive type photodiode region formed in the active area of the first conductive type semiconductor substrate, a readout circuit formed in the active area of the first conductive type semiconductor substrate to read out data of the photodiode regions, and a first conductive type well formed between the second conductive type photodiode region and the STI layer.

Abstract: An image sensor and a method for fabricating the same are disclosed, to improve a contact quality between a contact plug and a source diffusion layer.

Abstract: A method for fabricating an image sensor includes forming a seed layer on a semiconductor substrate, forming a blocking layer on the seed layer, partially exposing a region for transistor in an active region of the semiconductor substrate by patterning the seed layer and the blocking layer, selectively forming a gate insulating material layer in a portion of the exposed region for transistor, filling a gate electrode material layer in the exposed region for transistor over the gate insulating material layer, forming a gate insulating layer pattern and a gate electrode pattern by selectively removing the blocking layer, the gate insulating material layer, the gate electrode material layer, and the seed layer, and forming source and drain diffusion layers and a photodiode on both sides of the gate insulating layer pattern and the gate electrode pattern by selectively doping impurity ions.

Abstract: The present invention provides a method of fabricating a semiconductor device, by which leakage current is minimized and by which drivability of transistor is sustained. The present invention includes forming a gate pattern having a gate oxide layer underneath on a semiconductor substrate, forming a first oxide layer on the substrate including the gate pattern, forming lightly doped regions in the semiconductor substrate to be aligned with the gate pattern, forming a second oxide layer on the first oxide layer, forming a spacer on the second oxide layer over a sidewall of the gate pattern, forming a sacrifice layer over the substrate including the spacer, forming source and drain regions in the substrate to be aligned with the gate pattern and to be partially overlapped with the lightly doped regions, respectively, and removing the sacrifice insulating layer and portions of the first and second oxide layers failing to be covered with the spacer.