Abstract: A memory system includes a nonvolatile memory device and a memory controller. The nonvolatile memory device includes first memory blocks configured to store m-bit data per cell and second memory blocks configured to store n-bit data per cell. The memory controller is configured to control the nonvolatile memory device to close an open word line generated in a second memory block of the second memory blocks when a program operation is performed on the second memory block.

Abstract: A memory system includes a nonvolatile memory device and a memory controller. The nonvolatile memory device includes first memory blocks configured to store m-bit data per cell and second memory blocks configured to store n-bit data per cell. The memory controller is configured to control the nonvolatile memory device to close an open word line generated in a second memory block of the second memory blocks when a program operation is performed on the second memory block.

Abstract: A memory system includes a nonvolatile memory device and a memory controller. The nonvolatile memory device includes first memory blocks configured to store m-bit data per cell and second memory blocks configured to store n-bit data per cell. The memory controller is configured to control the nonvolatile memory device to close an open word line generated in a second memory block of the second memory blocks when a program operation is performed on the second memory block.

Abstract: In one embodiment, a memory system includes a memory device with a first memory and a second memory, and a controller configured to control storing of data in the memory device. The controller is configured to control an (N?1)th piece of meta data to be stored in the second memory when an Nth piece of user data is stored in the first memory or control the Nth piece of the user data to be stored in the second memory when the (N?1)th piece of the meta data is stored in the first memory, where N denotes a natural number equal to or greater than ‘1’. Also, a time period of storing the Nth piece of the user data is controlled to partially or entirely overlap with a time period of storing the (N?1)th piece of the meta data.

Abstract: A memory system includes a nonvolatile memory device and a memory controller. The nonvolatile memory device includes first memory blocks configured to store m-bit data per cell and second memory blocks configured to store n-bit data per cell. The memory controller is configured to control the nonvolatile memory device to close an open word line generated in a second memory block of the second memory blocks when a program operation is performed on the second memory block.

Abstract: A memory card system and related write method are disclosed. The method includes receiving a write request for a predetermined page; performing a write operation on a first log block that corresponds to a first data block including the page; receiving an update request for the page; and performing a write operation on a second log block that corresponds to the first data block. The memory card system includes: at least one non-volatile memory including a data block and a log block for updating the data block; and a memory controller controlling an operation of the non-volatile memory. During a write operation for a predetermined page, the controller controls writing of a first log block corresponding to a first data block including the predetermined page, and controls writing of a second log block during an update operation of the predetermined page.

Abstract: In one embodiment, a memory system includes a memory device with a first memory and a second memory, and a controller configured to control storing of data in the memory device. The controller is configured to control an (N?1)th piece of meta data to be stored in the second memory when an Nth piece of user data is stored in the first memory or control the Nth piece of the user data to be stored in the second memory when the (N?1)th piece of the meta data is stored in the first memory, where N denotes a natural number equal to or greater than ‘1’. Also, a time period of storing the Nth piece of the user data is controlled to partially or entirely overlap with a time period of storing the (N?1)th piece of the meta data.

Abstract: A flash memory device performs an erase operation by execution of an over program. device. In response to an erase request directed to requested page data a logical page address is converted to a corresponding physical page address, an over program data pattern for an over program operation is generated, and the over program operation is executed using the PPA to change a threshold voltage distribution for at least one memory cell of the requested page data in accordance with the over program data pattern.

Abstract: A memory card system and related write method are disclosed. The method includes receiving a write request for a predetermined page; performing a write operation on a first log block that corresponds to a first data block including the page; receiving an update request for the page; and performing a write operation on a second log block that corresponds to the first data block. The memory card system includes: at least one non-volatile memory including a data block and a log block for updating the data block; and a memory controller controlling an operation of the non-volatile memory. During a write operation for a predetermined page, the controller controls writing of a first log block corresponding to a first data block including the predetermined page, and controls writing of a second log block during an update operation of the predetermined page.

Abstract: A method and apparatus for controlling an amount of buffer data in a receiver of a data communication system, and a method and apparatus for playing back streaming data stored in a buffer, using an adaptive clock synchronization unit. The apparatus for controlling an amount of buffer data in a receiver of a data communication system includes a buffer for temporarily storing data, an adaptive rate determination unit for determining a rate at which data is used using operating conditions of the receiver and an amount of data stored in the buffer, and a data utilization unit for utilizing the data stored in the buffer at the determined rate. The method for adaptively controlling an amount of buffer data in a receiver of a data communication system, comprising determining a rate at which data stored in a buffer are used, considering operating conditions of a receiver and an amount of data stored in a buffer, and utilizing the data stored in the buffer at the determined rate.

Abstract: A method and apparatus for controlling an amount of buffer data in a receiver of a data communication system, and a method and apparatus for playing back streaming data stored in a buffer, using an adaptive clock synchronization unit. The apparatus for controlling an amount of buffer data in a receiver of a data communication system includes a buffer for temporarily storing data, an adaptive rate determination unit for determining a rate at which data is used using operating conditions of the receiver and an amount of data stored in the buffer, and a data utilization unit for utilizing the data stored in the buffer at the determined rate. The method for adaptively controlling an amount of buffer data in a receiver of a data communication system, comprising determining a rate at which data stored in a buffer are used, considering operating conditions of a receiver and an amount of data stored in a buffer, and utilizing the data stored in the buffer at the determined rate.