Patents by Inventor Hee-Won Yoon
Hee-Won Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240111848Abstract: An example electronic device includes a display, a communication circuit, a memory, and at least one processor configured to, based on a signal for requesting transmission of identification information including a call word for using first mode of an artificial intelligence assistant function of the electronic device being received, from another electronic device, through the communication circuit using first communication method, control the display to display a user interface for requesting user confirmation for transmission of the identification information; control the communication circuit to transmit the identification information to the another electronic device as a result of user confirmation through the user interface; and receive information for using a second communication method from the another electronic device.Type: ApplicationFiled: December 8, 2023Publication date: April 4, 2024Inventors: Chang-bae YOON, Jeong-in KIM, Se-won OH, Hyo-young CHO, Kyung-rae KIM, Hee-jung KIM, Hyun-jin YANG, Ji-won CHA
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Patent number: 11936052Abstract: Provided is a fluorine-doped tin oxide support, a platinum catalyst for a fuel cell having the same, and a method for producing the same. Also described is a high electrical conductivity and electrochemical durability by doping fluorine to the tin oxide-based support through an electrospinning process. Thus, while resolving a degradation issue of the carbon support in the conventional commercially available platinum/carbon (Pt/C) catalyst, what is designed is to minimize an electrochemical elution of dopant or tin, which is a limitation of the tin oxide support itself and has excellent performance as a catalyst for a fuel cell.Type: GrantFiled: April 16, 2020Date of Patent: March 19, 2024Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Jin Young Kim, Jong Min Kim, Hee-Young Park, So Young Lee, Hyun Seo Park, Sung Jong Yoo, Jong Hyun Jang, Hyoung-Juhn Kim, Chang Won Yoon, Jonghee Han
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Patent number: 11889724Abstract: A display device includes: an array substrate including a pixel array disposed on a display area, a first transfer wiring disposed on a peripheral area adjacent to the display area and electrically connected to the pixel array, a second transfer wiring disposed on the peripheral area adjacent to the display area and electrically connected to the pixel array, and a barrier member disposed between the first transfer wiring and the second transfer wiring, the barrier member including an inorganic insulation material; and a sealing member disposed between the array substrate and an encapsulation substrate to combine the array substrate with the encapsulation substrate, the sealing member contacting at least a portion of the first transfer wiring and the second transfer wiring.Type: GrantFiled: May 27, 2020Date of Patent: January 30, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Hwiseong Kim, Donghoo Kim, Hoisoo Kwon, Hee-Won Yoon, Soojeong Choi, Gwangjoon Hong
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Patent number: 11785798Abstract: A display device includes: a substrate including an opening area, a peripheral area surrounding the opening area, and a display area surrounding the peripheral area; a transistor overlapping the display area on the substrate; an insulation layer on the transistor; a first electrode on the insulation layer; a pixel definition layer on the first electrode; an intermediate layer and a second electrode that overlap the first electrode and include a functional layer; a dam overlapping the peripheral area; and a first layer overlapping the peripheral area and spaced apart from the intermediate layer, wherein the first layer is spaced apart from an upper surface of the dam and covers a side surface of the dam.Type: GrantFiled: April 28, 2021Date of Patent: October 10, 2023Assignee: Samsung Display Co., Ltd.Inventors: Hoi Soo Kwon, Sun Young Kim, Seung Hwan Kim, Hwi Seong Kim, Yu Jin Ye, Jae-Man Lee, Hee-Won Yoon
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Publication number: 20230292574Abstract: A display device includes a signal transmission region, a display region spaced apart from the signal transmission region, a peripheral region located between the signal transmission region and the display region, a base layer, a circuit layer disposed on the base layer, a light emitting element layer disposed on the circuit layer and that includes a light emitting element that overlaps the display region, an encapsulation substrate disposed on the light emitting element layer, a hole defined in the signal transmission region and that passes through at least a portion of each of the circuit layer and the light emitting element layer, and a groove pattern defined on one surface of the encapsulation substrate and that overlaps the peripheral region.Type: ApplicationFiled: January 20, 2023Publication date: September 14, 2023Inventors: Jae-Man Lee, Hoon Kim, Hwiseong Kim, Donghoo Kim, Sunyoung Kim, Hee-Won Yoon, Seungwon Lee
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Publication number: 20230071179Abstract: A display device includes a base substrate; an oxide semiconductor layer disposed on the base substrate; a first gate insulating layer disposed on a first channel region of the oxide semiconductor layer and that overlaps the first channel region thereof; a first upper gate electrode disposed on the first gate insulating layer ; and an upper interlayer insulating layer disposed on the first upper gate electrode, the first upper gate electrode, and the oxide semiconductor layer, wherein the upper interlayer insulating layer includes a first upper interlayer insulating layer, a second upper interlayer insulating layer, and a third upper interlayer insulating layer, the first upper interlayer insulating layer includes silicon oxide, each of the second and third upper interlayer insulating layers include silicon nitride, and a hydrogen concentration in the second upper interlayer insulating layer is less than a hydrogen concentration in the third upper interlayer insulating layer.Type: ApplicationFiled: October 27, 2022Publication date: March 9, 2023Inventors: JUNG YUB SEO, Tetsuhiro Tanaka, Hee Won Yoon, Shin Beom Choi
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Publication number: 20230055784Abstract: A display panel includes a substrate including a first area, a second area surrounding the first area, and a third area surrounding the second area, and a barrier part disposed on the substrate in the second area and including a first partition including a concave-convex structure on a surface facing the first area in a plan view. The display panel further includes a filling layer disposed on the substrate in the first area and the second area and adjacent to the concave-convex structure and a light emitting diode layer disposed in the third area on the substrate and adjacent to the first partition.Type: ApplicationFiled: May 24, 2022Publication date: February 23, 2023Inventors: HWISEONG KIM, HOISOO KWON, DONGHOO KIM, YUJIN YE, SEUNGWON LEE, JAE-MAN LEE, HEE-WON YOON
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Patent number: 11502110Abstract: A display device includes a base substrate; an oxide semiconductor layer disposed on the base substrate; a first gate insulating layer disposed on a first channel region of the oxide semiconductor layer and that overlaps the first channel region thereof; a first upper gate electrode disposed on the first gate insulating layer; and an upper interlayer insulating layer disposed on the first upper gate electrode, the first upper gate electrode, and the oxide semiconductor layer, wherein the upper interlayer insulating layer includes a first upper interlayer insulating layer, a second upper interlayer insulating layer, and a third upper interlayer insulating layer, the first upper interlayer insulating layer includes silicon oxide, each of the second and third upper interlayer insulating layers include silicon nitride, and a hydrogen concentration in the second upper interlayer insulating layer is less than a hydrogen concentration in the third upper interlayer insulating layer.Type: GrantFiled: October 26, 2020Date of Patent: November 15, 2022Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Jung Yub Seo, Tetsuhiro Tanaka, Hee Won Yoon, Shin Beom Choi
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Publication number: 20220131106Abstract: A display device includes: a substrate including an opening area, a peripheral area surrounding the opening area, and a display area surrounding the peripheral area; a transistor overlapping the display area on the substrate; an insulation layer on the transistor; a first electrode on the insulation layer; a pixel definition layer on the first electrode; an intermediate layer and a second electrode that overlap the first electrode and include a functional layer; a dam overlapping the peripheral area; and a first layer overlapping the peripheral area and spaced apart from the intermediate layer, wherein the first layer is spaced apart from an upper surface of the dam and covers a side surface of the dam.Type: ApplicationFiled: April 28, 2021Publication date: April 28, 2022Inventors: Hoi Soo KWON, Sun Young KIM, Seung Hwan KIM, Hwi Seong KIM, Yu Jin YE, Jae-Man LEE, Hee-Won YOON
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Publication number: 20220005901Abstract: A display device comprises a base substrate, a lower interlayer dielectric layer, an oxide semiconductor layer including a first channel region, a first drain region disposed on one side of the first channel region, and a first source region, a first gate insulating layer, a first upper gate electrode, an upper interlayer dielectric layer, and a first source electrode and a first drain electrode, wherein the lower interlayer dielectric layer includes a first lower interlayer dielectric layer disposed on the base substrate, and a second lower interlayer dielectric layer disposed on the first lower interlayer dielectric layer, wherein the first lower interlayer dielectric layer includes silicon nitride and the second lower interlayer dielectric layer comprises silicon oxide, and wherein a composition ratio of nitrogen to silicon in the first lower interlayer dielectric layer ranges from 0.8 to 0.89.Type: ApplicationFiled: June 15, 2021Publication date: January 6, 2022Inventors: Tetsuhiro TANAKA, Jung Yub SEO, Ki Seong SEO, Yeong Gyu KIM, Hee Won YOON
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Publication number: 20210296367Abstract: A display device includes a base substrate; an oxide semiconductor layer disposed on the base substrate; a first gate insulating layer disposed on a first channel region of the oxide semiconductor layer and that overlaps the first channel region thereof; a first upper gate electrode disposed on the first gate insulating layer; and an upper interlayer insulating layer disposed on the first upper gate electrode, the first upper gate electrode, and the oxide semiconductor layer, wherein the upper interlayer insulating layer includes a first upper interlayer insulating layer, a second upper interlayer insulating layer, and a third upper interlayer insulating layer, the first upper interlayer insulating layer includes silicon oxide, each of the second and third upper interlayer insulating layers include silicon nitride, and a hydrogen concentration in the second upper interlayer insulating layer is less than a hydrogen concentration in the third upper interlayer insulating layer.Type: ApplicationFiled: October 26, 2020Publication date: September 23, 2021Inventors: Jung Yub SEO, Tetsuhiro TANAKA, Hee Won YOON, Shin Beom CHOI
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Publication number: 20210111238Abstract: A display device includes: an array substrate including a pixel array disposed on a display area, a first transfer wiring disposed on a peripheral area adjacent to the display area and electrically connected to the pixel array, a second transfer wiring disposed on the peripheral area adjacent to the display area and electrically connected to the pixel array, and a barrier member disposed between the first transfer wiring and the second transfer wiring, the barrier member including an inorganic insulation material; and a sealing member disposed between the array substrate and an encapsulation substrate to combine the array substrate with the encapsulation substrate, the sealing member contacting at least a portion of the first transfer wiring and the second transfer wiring.Type: ApplicationFiled: May 27, 2020Publication date: April 15, 2021Inventors: Hwiseong KIM, Donghoo Kim, Hoisoo Kwon, Hee-Won Yoon, Soojeong Choi, Gwangjoon Hong