Abstract: An Integrated Circuit (IC) semiconductor device includes: field insulating layers buried in field trenches disposed apart from each other inside a substrate; active regions defined by the field insulating layers; and active fins disposed on the active regions and protruding from surfaces of the field insulating layers. The field insulating layers include a first subfield insulating layer and a second subfield insulating layer, and a surface of the first subfield insulating layer is disposed at a level lower than a level of a surface of the second subfield insulating layer.

Abstract: An integrated circuit (IC) device includes a gate trench formed inside a substrate, the gate trench including a bottom portion and a sidewall portion, a gate electrode structure disposed apart from the bottom portion and the sidewall portion of the gate trench, the gate electrode structure including a gate electrode including a first sub-gate electrode formed in a lower portion of the gate trench and a second sub-gate electrode formed on the first sub-gate electrode and a gate capping layer formed on the second sub-gate electrode, and a gate insulating layer formed between the gate trench and the gate electrode structure, the gate insulating layer including a base insulating layer formed between the bottom portion and the sidewall portion of the gate trench and the gate electrode structure and a reinforcing insulating layer formed on a sidewall portion of the second sub-gate electrode.

Abstract: A semiconductor device includes a first trench on the device region, a first device isolation layer in the first trench and defining an active pattern of the device region, a second trench on the interface region, and a second device isolation layer in the second trench. The second isolation layer includes a buried dielectric pattern, a dielectric liner pattern on the buried dielectric pattern, and a first gap-fill dielectric pattern on the dielectric liner pattern. The buried dielectric pattern includes a floor segment on a floor of the second trench, and a sidewall segment on a sidewall of the second trench. The sidewall segment has a thickness different from a thickness of the floor segment.

Abstract: A semiconductor device includes a first trench on the device region, a first device isolation layer in the first trench and defining an active pattern of the device region, a second trench on the interface region, and a second device isolation layer in the second trench. The second isolation layer includes a buried dielectric pattern, a dielectric liner pattern on the buried dielectric pattern, and a first gap-fill dielectric pattern on the dielectric liner pattern. The buried dielectric pattern includes a floor segment on a floor of the second trench, and a sidewall segment on a sidewall of the second trench. The sidewall segment has a thickness different from a thickness of the floor segment.