Abstract: A display device includes first data lines including first color data lines connected to first sub-pixels, second color data lines connected to second sub-pixels, and third color data lines connected to third sub-pixels, and fan out lines including first fan out lines, second fan out lines alternately arranged with the first fan out lines in a peripheral region, and third fan out lines, a data driver outputting data voltages to the first fan out lines and the second fan out lines connected to the first data lines in a first arrangement according to the first arrangement, and output the data voltages to the third fan out lines connected to the first data lines in a second arrangement according to the second arrangement, and a timing controller remapping input image data based on the first arrangement.

Abstract: A display device includes first data lines including first color data lines connected to first sub-pixels, second color data lines connected to second sub-pixels, and third color data lines connected to third sub-pixels, and fan out lines including first fan out lines, second fan out lines alternately arranged with the first fan out lines in a peripheral region, and third fan out lines, a data driver outputting data voltages to the first fan out lines and the second fan out lines connected to the first data lines in a first arrangement according to the first arrangement, and output the data voltages to the third fan out lines connected to the first data lines in a second arrangement according to the second arrangement, and a timing controller remapping input image data based on the first arrangement.

Abstract: Provided is a data driver including a digital to analog converter configured to convert image signal data into a plurality of data voltages, and an output buffer unit including a plurality of channels for outputting the plurality of data voltages. The output buffer unit includes a plurality of output blocks. Each output block includes one or more channels. Data voltages outputted from a first output block among the plurality of output blocks are delayed with a first time difference. Data voltages outputted from a second output block among the plurality of output blocks are delayed with a second time difference which is different from the first time difference.

Abstract: A display device includes first data lines including first color data lines connected to first sub-pixels, second color data lines connected to second sub-pixels, and third color data lines connected to third sub-pixels, and fan out lines including first fan out lines, second fan out lines alternately arranged with the first fan out lines in a peripheral region, and third fan out lines, a data driver outputting data voltages to the first fan out lines and the second fan out lines connected to the first data lines in a first arrangement according to the first arrangement, and output the data voltages to the third fan out lines connected to the first data lines in a second arrangement according to the second arrangement, and a timing controller remapping input image data based on the first arrangement.

Abstract: A display device includes a display panel including a plurality of pixels, a controller for providing a clock-embedded data signal including image data in an active period and including a training pattern in a blank period, and a data driver for recovering the image data from the clock-embedded data signal based on an internal clock signal to provide data voltages corresponding to the image data to the plurality of pixels in the active period, and to perform a training operation for the internal clock signal using the training pattern included in the clock-embedded data signal in the blank period. The training pattern in the blank period includes a first training clock signal modulated with a first modulation period during a first time, and includes a second training clock signal modulated with a second modulation period different from the first modulation period after the first time.

Abstract: A display device includes: a display panel comprising a display area including a plurality of pixels and a non-display area disposed around the display area; and a plurality of flexible printed circuit boards disposed in the non-display area along a first edge of the display panel, where distances of a first end portion of each of the flexible printed circuit boards from the first edge are different from each other.

Abstract: A display device includes a display panel including first and second panel pads electrically connected to each other, a connection board including first and second connection board pads connected to the first and second panel pads, respectively, an output pad, and a driving circuit. The driving circuit includes a pull-up resistor connected between a first voltage terminal and a first node, and a comparator configured to compare a voltage at the first node with a reference voltage and to output a contact test signal corresponding to a comparison result to the output pad. The first connection board pad is electrically connected to the first node, and the second connection board pad is connected to a second voltage terminal.

Abstract: Provided is a data driver including a digital to analog converter configured to convert image signal data into a plurality of data voltages, and an output buffer unit including a plurality of channels for outputting the plurality of data voltages. The output buffer unit includes a plurality of output blocks. Each output block includes one or more channels. Data voltages outputted from a first output block among the plurality of output blocks are delayed with a first time difference. Data voltages outputted from a second output block among the plurality of output blocks are delayed with a second time difference which is different from the first time difference.

Abstract: A display device includes a display panel including a plurality of pixels, a controller for providing a clock-embedded data signal including image data in an active period and including a training pattern in a blank period, and a data driver for recovering the image data from the clock-embedded data signal based on an internal clock signal to provide data voltages corresponding to the image data to the plurality of pixels in the active period, and to perform a training operation for the internal clock signal using the training pattern included in the clock-embedded data signal in the blank period. The training pattern in the blank period includes a first training clock signal modulated with a first modulation period during a first time, and includes a second training clock signal modulated with a second modulation period different from the first modulation period after the first time.

Abstract: A display device includes a timing controller which supplies a clock training signal through a data clock signal line and a first control signal through a shared signal line in a first period of one frame, and supplies image data through the data clock signal line in a second period of the one frame, a data driver provided with data driving circuits which generate a clock signal based on the clock training signal and the first control signal in the first period, and generate data voltages based on the clock signal and the image data in the second period, and a pixel part which receives the data voltages from the data driver. The data driver may supply a second control signal indicating a reception state of the data driver to the timing controller through the shared signal line in the second period.

Abstract: A display device includes a timing controller which supplies a clock training signal through a data clock signal line and a first control signal through a shared signal line in a first period of one frame, and supplies image data through the data clock signal line in a second period of the one frame, a data driver provided with data driving circuits which generate a clock signal based on the clock training signal and the first control signal in the first period, and generate data voltages based on the clock signal and the image data in the second period, and a pixel part which receives the data voltages from the data driver. The data driver may supply a second control signal indicating a reception state of the data driver to the timing controller through the shared signal line in the second period.

Abstract: A display device includes a display panel including first and second panel pads electrically connected to each other, a connection board including first and second connection board pads connected to the first and second panel pads, respectively, an output pad, and a driving circuit. The driving circuit includes a pull-up resistor connected between a first voltage terminal and a first node, and a comparator configured to compare a voltage at the first node with a reference voltage and to output a contact test signal corresponding to a comparison result to the output pad. The first connection board pad is electrically connected to the first node, and the second connection board pad is connected to a second voltage terminal.

Abstract: The present invention relates to an improved method for producing a diphenylmethane derivative which is effective as a sodium-dependent glucose cotransporter (SGLT) inhibitor, the method being carried out by means of a convergent synthesis method in which each major group is separately synthesized and then coupled. As such, in comparison to a linear synthesis method disclosed in existing documents, the synthesis pathway is compact and yield can be increased, and risk factors inherent in the linear synthesis pathway can be reduced. Furthermore, the crystal form of the compound produced according to the method has superb physicochemical characteristics, and thus can be effectively utilized in fields such as pharmaceutical manufacturing.

Abstract: The present invention relates to an improved method for producing a diphenylmethane derivative which is effective as a sodium-dependent glucose cotransporter (SGLT) inhibitor, the method being carried out by means of a convergent synthesis method in which each major group is separately synthesized and then coupled. As such, in comparison to a linear synthesis method disclosed in existing documents, the synthesis pathway is compact and yield can be increased, and risk factors inherent in the linear synthesis pathway can be reduced. Furthermore, the crystal form of the compound produced according to the method has superb physicochemical characteristics, and thus can be effectively utilized in fields such as pharmaceutical manufacturing.

Abstract: The present invention relates to an improved method for producing a diphenylmethane derivative which is effective as a sodium-dependent glucose cotransporter (SGLT) inhibitor, the method being carried out by means of a convergent synthesis method in which each major group is separately synthesized and then coupled. As such, in comparison to a linear synthesis method disclosed in existing documents, the synthesis pathway is compact and yield can be increased, and risk factors inherent in the linear synthesis pathway can be reduced. Furthermore, the crystal form of the compound produced according to the method has superb physicochemical characteristics, and thus can be effectively utilized in fields such as pharmaceutical manufacturing.

Abstract: The present invention relates to an improved method for producing a diphenylmethane derivative which is effective as a sodium-dependent glucose cotransporter (SGLT) inhibitor, the method being carried out by means of a convergent synthesis method in which each major group is separately synthesized and then coupled. As such, in comparison to a linear synthesis method disclosed in existing documents, the synthesis pathway is compact and yield can be increased, and risk factors inherent in the linear synthesis pathway can be reduced. Furthermore, the crystal form of the compound produced according to the method has superb physicochemical characteristics, and thus can be effectively utilized in fields such as pharmaceutical manufacturing.

Abstract: Provided is pyrazole derivatives as a TNIK (Traf2- and NCK-interacting kinase), IKK? (I-kappa-B kinase epsilon) and TBK1 (TANK-binding kinase 1) inhibitor; the pyrazole derivative according to the present invention effectively inhibits TNIK, IKK? and TBK1, and thus is useful not only as an anticancer agent for the treatment of various cancers including colorectal cancer, breast cancer, CNS cancer, colon cancer, non-small cell lung cancer, kidney cancer, prostate cancer, ovarian cancer, uterus cancer, stomach cancer, liver cancer, skin cancer, lung cancer, brain cancer, bladder cancer, esophageal cancer, pancreatic cancer, thyroid cancer, head and neck cancer, squamous cell carcinoma, osteosarcoma, B-cell or T-cell lymphoma, acute or chronic leukemia and multiple myeloma, but as a therapeutic agent for chronic inflammation.

Abstract: A display device may include: a plurality of pixels; a gate driver that receives clock signals and generates and applies a plurality of gate signals to a respective plurality of gate lines connected to the plurality of pixels; and a clock signal driver. The clock signal driver may output the clock signals and receive feedback clock signals derived from the clock signals, compare the feedback clock signals, and control amplitudes of the clock signals so that an amplitude difference between the feedback clock signals is less than a threshold.

Abstract: Provided are 7-azaindole or 4,7-diazaindole derivatives as an IKK? (I-kappa-B kinase epsilon) and TBK1 (TANK-binding kinase 1) inhibitor. The 7-azaindole or 4,7-diazaindole derivative effectively inhibits IKK? and TBK1, and thus is useful not only as an anticancer agent for the treatment of various cancers including colorectal cancer, breast cancer, CNS cancer, colon cancer, non-small cell lung cancer, kidney cancer, prostate cancer, ovarian cancer, uterus cancer, stomach cancer, liver cancer, skin cancer, lung cancer, brain cancer, bladder cancer, esophageal cancer, pancreatic cancer, thyroid cancer, head and neck cancer, squamous cell carcinoma, osteosarcoma, B-cell or T-cell lymphoma, acute or chronic leukemia and multiple myeloma, but as a therapeutic agent for chronic inflammation.

Abstract: A display device may include: a plurality of pixels; a gate driver that receives clock signals and generates and applies a plurality of gate signals to a respective plurality of gate lines connected to the plurality of pixels; and a clock signal driver. The clock signal driver may output the clock signals and receive feedback clock signals derived from the clock signals, compare the feedback clock signals, and control amplitudes of the clock signals so that an amplitude difference between the feedback clock signals is less than a threshold.