Abstract: A semiconductor package includes a circuit pattern extending in a horizontal direction. The circuit pattern is conductive. A first insulation layer is disposed on the circuit pattern. A semiconductor chip is disposed on the first insulation layer. The first insulation layer includes first protrusions which protrude from a bottom surface of the first insulation layer, penetrate through at least a portion of the circuit pattern, and have a mesh structure. A second protrusion protrudes from the bottom surface of the first insulation layer and penetrates at least a portion of the circuit pattern. The second protrusion is spaced apart from the semiconductor chip in the horizontal direction. The second protrusion has a width in the horizontal direction wider than that of each of the first protrusions.

Abstract: Provided is a method for managing a cloud server by using a manager server in a cloud environment, the method including receiving server template information of a first cloud server in a cloud domain, to which the manager server pertains, from the first cloud server, generating server setting information for a cloud server in the cloud domain based on the server template information of the first cloud server, and transmitting the server setting information for the cloud server to the first cloud server to drive the first cloud server.

Abstract: A semiconductor package includes a circuit pattern extending in a horizontal direction. The circuit pattern is conductive. A first insulation layer is disposed on the circuit pattern. A semiconductor chip is disposed on the first insulation layer. The first insulation layer includes first protrusions which protrude from a bottom surface of the first insulation layer, penetrate through at least a portion of the circuit pattern, and have a mesh structure. A second protrusion protrudes from the bottom surface of the first insulation layer and penetrates at least a portion of the circuit pattern. The second protrusion is spaced apart from the semiconductor chip in the horizontal direction. The second protrusion has a width in the horizontal direction wider than that of each of the first protrusions.

Abstract: A semiconductor package includes a circuit pattern extending in a horizontal direction. The circuit pattern is conductive. A first insulation layer is disposed on the circuit pattern. A semiconductor chip is disposed on the first installation layer. The first insulation layer includes first protrusions which protrude from a bottom surface of the first insulation layer, penetrate through at least a portion of the circuit pattern, and have a mesh structure. A second protrusion protrudes from the bottom surface of the first insulation layer and penetrates at least a portion of the circuit pattern. The second protrusion is spaced apart from the semiconductor chip in the horizontal direction. The second protrusion has a width in the horizontal direction wider than that of each of the first protrusions.

Abstract: A semiconductor package includes a circuit pattern extending in a horizontal direction. The circuit pattern is conductive. A first insulation layer is disposed on the circuit pattern. A semiconductor chip is disposed on the first installation layer. The first insulation layer includes first protrusions which protrude from a bottom surface of the first insulation layer, penetrate through at least a portion of the circuit pattern, and have a mesh structure. A second protrusion protrudes from the bottom surface of the first insulation layer and penetrates at least a portion of the circuit pattern. The second protrusion is spaced apart from the semiconductor chip in the horizontal direction. The second protrusion has a width in the horizontal direction wider than that of each of the first protrusions.

Abstract: Provided is a method for managing a cloud server by using a manager server in a cloud environment, the method including receiving server template information of a first cloud server in a cloud domain, to which the manager server pertains, from the first cloud server, generating server setting information for a cloud server in the cloud domain based on the server template information of the first cloud server, and transmitting the server setting information for the cloud server to the first cloud server to drive the first cloud server.

Abstract: A semiconductor package includes a package base substrate including bonding pads and a connection pads respectively on an upper surface and a lower surface of the package base substrate, four semiconductor chips attached onto the package base substrate, including a 1A semiconductor chip, a 1B semiconductor chip, a 2A semiconductor chip, and a 2B semiconductor chip, and each including a plurality of chip pads that are adjacent to a first edge of an upper surface of each of the 1A semiconductor chip, the 1B semiconductor chip, the 2A semiconductor chip, and the 2B semiconductor chip, and a bonding wire electrically connecting the chip pad and the bonding pad to each other, wherein the four semiconductor chips are disposed on the package base substrate such that first edges of the four semiconductor chips respectively face edges of the package base substrate that are different from each other.

Abstract: A semiconductor package includes a package base substrate including bonding pads and a connection pads respectively on an upper surface and a lower surface of the package base substrate, four semiconductor chips attached onto the package base substrate, including a 1A semiconductor chip, a 1B semiconductor chip, a 2A semiconductor chip, and a 2B semiconductor chip, and each including a plurality of chip pads that are adjacent to a first edge of an upper surface of each of the 1A semiconductor chip, the 1B semiconductor chip, the 2A semiconductor chip, and the 2B semiconductor chip, and a bonding wire electrically connecting the chip pad and the bonding pad to each other, wherein the four semiconductor chips are disposed on the package base substrate such that first edges of the four semiconductor chips respectively face edges of the package base substrate that are different from each other.

Abstract: A semiconductor package includes a package base substrate including bonding pads and a connection pads respectively on an upper surface and a lower surface of the package base substrate, four semiconductor chips attached onto the package base substrate, including a 1A semiconductor chip, a 1B semiconductor chip, a 2A semiconductor chip, and a 2B semiconductor chip, and each including a plurality of chip pads that are adjacent to a first edge of an upper surface of each of the 1A semiconductor chip, the 1B semiconductor chip, the 2A semiconductor chip, and the 2B semiconductor chip, and a bonding wire electrically connecting the chip pad and the bonding pad to each other, wherein the four semiconductor chips are disposed on the package base substrate such that first edges of the four semiconductor chips respectively face edges of the package base substrate that are different from each other.

Abstract: A semiconductor package includes a package base substrate including bonding pads and a connection pads respectively on an upper surface and a lower surface of the package base substrate, four semiconductor chips attached onto the package base substrate, including a 1A semiconductor chip, a 1B semiconductor chip, a 2A semiconductor chip, and a 2B semiconductor chip, and each including a plurality of chip pads that are adjacent to a first edge of an upper surface of each of the 1A semiconductor chip, the 1B semiconductor chip, the 2A semiconductor chip, and the 2B semiconductor chip, and a bonding wire electrically connecting the chip pad and the bonding pad to each other, wherein the four semiconductor chips are disposed on the package base substrate such that first edges of the four semiconductor chips respectively face edges of the package base substrate that are different from each other.

Abstract: A stack semiconductor package includes a first semiconductor package having a first package substrate and a first semiconductor chip mounted on the first package substrate. The first semiconductor chip includes first chip pads arranged along a side portion thereof. The stack semiconductor package includes a second semiconductor package disposed on the first semiconductor package, and includes a second package substrate. A first sub-chip and a second sub-chip is mounted on the second semiconductor package and arranged side by side extending along a direction of a first side portion of the second package substrate. Each of the first and second sub-chips includes second chip pads arranged along a side portion thereof. Connection wiring paths between interface portions and connection pads may be reduced and simplified, thereby preventing connection wires from being tangled. Moreover, connection wiring paths between a logic chip and a memory chip may be minimized, thereby providing high speed performance.

Abstract: There is provided plasma equipment including a power supply that supplies a RF power; a chamber in which plasma is generated, and a processing target to processed by the plasma is provided; an antenna coil that is provided on a top surface of the chamber, and is connected to the power supply to receive the RF power; and a resonance coil that is provided to be electrically insulated or cut off from the antenna coil. The resonance coil receives electromagnetic energy applied from the antenna coil to allow a current to flow, and the plasma is generated within the chamber. It is possible to increase the degree of freedom for an installation position of the resonance coil, and it is possible to increase plasma density.

Abstract: An apparatus for alleviating a voltage drop of a battery cell includes a battery having a plurality of battery cells, a sensor configured to sense the battery to generate sensing information, a calculator configured to calculate an allowable torque of a motor using the sensing information and calculate an expected voltage of the battery using the allowable torque and the sensing information, and a determinator configured to control a torque quantity of the motor using the expected voltage and a reference voltage.

Abstract: A stack semiconductor package includes a first semiconductor package having a first package substrate and a first semiconductor chip mounted on the first package substrate. The first semiconductor chip includes first chip pads arranged along a side portion thereof. The stack semiconductor package includes a second semiconductor package disposed on the first semiconductor package, and includes a second package substrate. A first sub-chip and a second sub-chip is mounted on the second semiconductor package and arranged side by side extending along a direction of a first side portion of the second package substrate. Each of the first and second sub-chips includes second chip pads arranged along a side portion thereof. Connection wiring paths between interface portions and connection pads may be reduced and simplified, thereby preventing connection wires from being tangled. Moreover, connection wiring paths between a logic chip and a memory chip may be minimized, thereby providing high speed performance.

Abstract: A multi-chip package may include a package substrate, a first semiconductor chip, a second semiconductor chip and a supporting member. The first semiconductor chip may be arranged on an upper surface of the package substrate. The first semiconductor chip may be electrically connected with the package substrate. The second semiconductor chip may be arranged on an upper surface of the first semiconductor chip. The second semiconductor chip may be electrically connected with the first semiconductor chip. The second semiconductor chip may have a protrusion overhanging an area beyond a side surface of the first semiconductor chip. The supporting member may be interposed between the protrusion of the second semiconductor chip and the package substrate to prevent a deflection of the protrusion. Thus, the protrusion may not be deflected.

Abstract: An apparatus for alleviating a voltage drop of a battery cell includes a battery having a plurality of battery cells, a sensor configured to sense the battery to generate sensing information, a calculator configured to calculate an allowable torque of a motor using the sensing information and calculate an expected voltage of the battery using the allowable torque and the sensing information, and a determinator configured to control a torque quantity of the motor using the expected voltage and a reference voltage.

Abstract: Provided are a tape package and a flat panel display device including the tape package. The tape package includes a base film, a semiconductor chip mounted on one surface of the base film, a wire pattern including an input wire pattern and an output wire pattern formed on one surface of the base film and electrically connected with the semiconductor chip, a solder resist covering the remaining portion, except for an end of the wire pattern, and a protection film provided on an edge at one side of the solder resist facing an end of the output wire pattern.

Abstract: There is provided plasma equipment including a power supply that supplies a RF power; a chamber in which plasma is generated, and a processing target to processed by the plasma is provided; an antenna coil that is provided on a top surface of the chamber, and is connected to the power supply to receive the RF power; and a resonance coil that is provided to be electrically insulated or cut off from the antenna coil. The resonance coil receives electromagnetic energy applied from the antenna coil to allow a current to flow, and the plasma is generated within the chamber. It is possible to increase the degree of freedom for an installation position of the resonance coil, and it is possible to increase plasma density.

Abstract: A multi-chip package may include a package substrate, a first semiconductor chip, a second semiconductor chip and a supporting member. The first semiconductor chip may be arranged on an upper surface of the package substrate. The first semiconductor chip may be electrically connected with the package substrate. The second semiconductor chip may be arranged on an upper surface of the first semiconductor chip. The second semiconductor chip may be electrically connected with the first semiconductor chip. The second semiconductor chip may have a protrusion overhanging an area beyond a side surface of the first semiconductor chip. The supporting member may be interposed between the protrusion of the second semiconductor chip and the package substrate to prevent a deflection of the protrusion. Thus, the protrusion may not be deflected.

Abstract: Provided are a tape package and a flat panel display device including the tape package. The tape package includes a base film, a semiconductor chip mounted on one surface of the base film, a wire pattern including an input wire pattern and an output wire pattern formed on one surface of the base film and electrically connected with the semiconductor chip, a solder resist covering the remaining portion, except for an end of the wire pattern, and a protection film provided on an edge at one side of the solder resist facing an end of the output wire pattern.