Patents by Inventor Hee-Sang Suh

Hee-Sang Suh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6940568
    Abstract: Disclosed is a thin film transistor substrate for LCD, for preventing the increase of failed pixels due to opening of gate line by when opening of gate line occurs, allowing black matrix to perform the function of the gate line on behalf of the opened gate line. The substrate includes: black matrix arranged between adjacent unit pixels on transparent insulating substrate; first oxide film formed on black matrix; active polysilicon layer pattern formed at active region; second oxide film formed on resultant substrate including active polysilicon layer pattern, and including first contact hole exposing predetermined portion of black matrix; gate line formed on selected area of second oxide film and electrically contacting with black matrix through first contact hole; third oxide film formed on resultant substrate; data line formed on third oxide film; planarizing film formed on third oxide film including data line; and pixel electrode formed on planarizing film.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: September 6, 2005
    Assignee: Lljin Diamond Co., Ltd.
    Inventor: Hee-Sang Suh
  • Publication number: 20050001946
    Abstract: Disclosed is a thin film transistor substrate for LCD, for preventing the increase of failed pixels due to opening of gate line by when opening of gate line occurs, allowing black matrix to perform the function of the gate line on behalf of the opened gate line. The substrate includes: black matrix arranged between adjacent unit pixels on transparent insulating substrate; first oxide film formed on black matrix; active polysilicon layer pattern formed at active region; second oxide film formed on resultant substrate including active polysilicon layer pattern, and including first contact hole exposing predetermined portion of black matrix; gate line formed on selected area of second oxide film and electrically contacting with black matrix through first contact hole; third oxide film formed on resultant substrate; data line formed on third oxide film; planarizing film formed on third oxide film including data line; and pixel electrode formed on planarizing film.
    Type: Application
    Filed: June 9, 2004
    Publication date: January 6, 2005
    Inventor: Hee-Sang Suh