Abstract: A voltage-controlled oscillator includes: a first transistor with its gate connected to an input terminal, its source connected to a first power supply, and its drain connected to a first node; a second transistor with its gate connected to a first bias voltage, its source connected to a second power supply, and its drain connected to the first node; and an inverter ring connected between the first node and the first power supply. The inverter ring is constituted by a plurality of stages of inverters connected in series, and an output of a final-stage inverter is connected to an output terminal and an input of an initial-stage inverter.

Abstract: A voltage-controlled oscillator includes: a first transistor with its gate connected to an input terminal, its source connected to a first power supply, and its drain connected to a first node; a second transistor with its gate connected to a first bias voltage, its source connected to a second power supply, and its drain connected to the first node; and an inverter ring connected between the first node and the first power supply. The inverter ring is constituted by a plurality of stages of inverters connected in series, and an output of a final-stage inverter is connected to an output terminal and an input of an initial-stage inverter.

Abstract: A differential switch drive circuit includes a current source, a current control circuit including a pair of transistors having a pair of differential input terminals, a pair of differential output terminals for outputting differential output voltages, and a common connection node connected to the current source, and load elements each connected to a corresponding one of the pair of differential output terminals. Currents flowing through the pair of transistors are controlled so that the sum of currents flowing through the load elements during a steady state of the differential output voltages is different from the sum of currents flowing through the load elements during a transient state of the differential output voltages.

Abstract: A filter circuit includes two parallel digital filters, a DAC, and an LPF. The DAC includes two parallel decoders, a parallel-to-serial converter, a switch driver, and a switch. A PLL circuit supplies a reference clock to the DAC. A frequency divider provided in the DAC divides the frequency of the reference clock by two, and supplies the half frequency clock to a parallel processing section (the two decoders and the parallel-to-serial converter) of the DAC and the two digital filters. This makes it easy to secure a timing margin, permitting use in high-speed communication on the order of several GHz.

Abstract: A switch device includes a plurality of differential switches formed in a semiconductor substrate. Each of the plurality of differential switches includes first and second differential transistors. The plurality of differential switches are placed in such a manner that the first differential transistors are adjacent to each other and the second differential transistors are adjacent to each other.

Abstract: A filter circuit includes two parallel digital filters, a DAC, and an LPF. The DAC includes two parallel decoders, a parallel-to-serial converter, a switch driver, and a switch. A PLL circuit supplies a reference clock to the DAC. A frequency divider provided in the DAC divides the frequency of the reference clock by two, and supplies the half frequency clock to a parallel processing section (the two decoders and the parallel-to-serial converter) of the DAC and the two digital filters. This makes it easy to secure a timing margin, permitting use in high-speed communication on the order of several GHz.

Abstract: A switch device includes a plurality of differential switches formed in a semiconductor substrate. Each of the plurality of differential switches includes first and second differential transistors. The plurality of differential switches are placed in such a manner that the first differential transistors are adjacent to each other and the second differential transistors are adjacent to each other.

Abstract: [Means for Solving the Problem] In a current switch circuit A used for a current steering D/A converter, a current switch basic circuit 1 includes first and second transistors Tr121 and Tr122 included in a differential switch 12. A threshold voltage control circuit 5 has an output terminal Vbout controlling the substrate voltage to be outputted to the substrate terminal of each of the two transistors Tr121 and Tr122 included in the differential switch 12 for controlling the threshold voltage of the two transistors of the differential switch. Accordingly, the present invention improves the decrease in the dynamic range of the current switch basic circuit 1 dependent on the threshold of each of the two transistors in the differential switch 12 and realizes a wider output voltage range without causing deterioration in properties even in a case that the power voltage is reduced in the current switch basic circuit 1.

Abstract: A filter circuit includes two parallel digital filters, a DAC, and an LPF. The DAC includes two parallel decoders, a parallel-to-serial converter, a switch driver, and a switch. A PLL circuit supplies a reference clock to the DAC. A frequency divider provided in the DAC divides the frequency of the reference clock by two, and supplies the half frequency clock to a parallel processing section (the two decoders and the parallel-to-serial converter) of the DAC and the two digital filters. This makes it easy to secure a timing margin, permitting use in high-speed communication on the order of several GHz.

Abstract: In a D/A converter that has a plurality of current sources (IS1, IS2 and IS3-1 to IS3-63) each including a transistor, and is for converting an input digital signal into an analog signal by selecting paths of currents output from the current sources (IS1, IS2 and IS3-1 to IS3-63), depending on the digital signal, a forward body bias voltage is applied to a back-gate terminal of the transistor included in each current source (IS1, IS2 and IS3-1 to IS3-63).

Abstract: In a current steering D/A converter, a 1LSB current source 1 and a 2LSB current source 2 are binary code current sources for outputting currents with current values weighted by ½, and a 4LSB current source 3 is one of a large number of current sources designed as thermometer code current source with the same structure. In first circuits A1, A2 and A4 for respectively determining constant current values of the current sources 1 through 3, a plurality of MOS transistors with a channel length L3 and a channel width W3 are cascode-connected to one another with gate terminals thereof shared. In second circuits B1, B2 and B4 respectively used for setting high output impedance of the current sources 1 through 3, a plurality of MOS transistors with a channel length L4 and a channel width W4 are cascode-connected to one another with gate terminals thereof shared.

Abstract: A differential switch circuit includes a first differential switch basic circuit (1) and a second differential switch basic circuit (2). The first differential switch basic circuit (1) has a first common source node (N1) shared by a plurality of transistors (TP121 and TP122), and the second differential switch basic circuit (2) has a second common source node (N2) shared by a plurality of transistors (TP131 and TP132). The first common source node (N1) and the second common source node (N2) are alternately reset to a predetermined voltage in each clock cycle.

Abstract: In a multi-channel current steering DA converter, e.g., a two-channel current steering DA converter, reference current sources Irefa and Irefb that can serve as current mirror sources for current sources Ia and Ib are provided in current source matrices 2a and 2b of the channels, respectively. During an operation, the reference current source Irefa or Irefb that is provided in the current source matrix of a channel that is not powered down is selected and used in accordance with control signals 6a and 6b. Therefore, even when one channel is powered down, the full-scale current of the other channel can be maintained at a constant value, i.e., unchanged.

Abstract: When a semiconductor circuit, in which a stabilizing capacitor 2 for stabilizing a reference voltage Vbias is connected to a reference voltage terminal RT, recovers from a power down state to an operational state, a current mirror circuit 40 provides current mirroring of a current Ia of a first current path Ph1, which generates an OFF threshold voltage ref1 of a hysteresis comparator 1, to generate a current Ib of a second current path Ph2, which generates the reference voltage Vbias. The reference voltage Vbias is input to the comparator 1 as an input voltage vin. When the reference voltage Vbias becomes equal to the OFF threshold voltage ref1, the comparator 1 immediately stops the charging of the stabilizing capacitor 2 by a current source I1.

Abstract: In a multiple signal switching circuit using four input signals IN1-IN4, a four-input latch circuit 3b is located. Four NAND circuits 6? are used as the four-input latch circuit 3b, when one of the four signals IN1-IN4 is “L” and the other three are “H.” In each of the NAND circuits 6?, an output is coupled to one of the four input signals IN1-IN4, the three signals other than the coupled signal are coupled to inputs. Therefore, even in a multiple signal switching circuit having three or more input signals, timing errors among multiple signals to be output can be effectively reduced.

Abstract: In a current steering D/A converter, a 1LSB current source 1 and a 2LSB current source 2 are binary code current sources for outputting currents with current values weighted by ½, and a 4LSB current source 3 is one of a large number of current sources designed as thermometer code current source with the same structure. In first circuits A1, A2 and A4 for respectively determining constant current values of the current sources 1 through 3, a plurality of MOS transistors with a channel length L3 and a channel width W3 are cascode-connected to one another with gate terminals thereof shared. In second circuits B1, B2 and B4 respectively used for setting high output impedance of the current sources 1 through 3, a plurality of MOS transistors with a channel length L4 and a channel width W4 are cascode-connected to one another with gate terminals thereof shared.

Abstract: A differential switch circuit includes a first differential switch basic circuit (1) and a second differential switch basic circuit (2). The first differential switch basic circuit (1) has a first common source node (N1) shared by a plurality of transistors (TP121 and TP122), and the second differential switch basic circuit (2) has a second common source node (N2) shared by a plurality of transistors (TP131 and TP132). The first common source node (N1) and the second common source node (N2) are alternately reset to a predetermined voltage in each clock cycle.

Abstract: [Means for Solving the Problem] In a current switch circuit A used for a current steering D/A converter, a current switch basic circuit 1 includes first and second transistors Tr121 and Tr122 included in a differential switch 12. A threshold voltage control circuit 5 has an output terminal Vbout controlling the substrate voltage to be outputted to the substrate terminal of each of the two transistors Tr121 and Tr122 included in the differential switch 12 for controlling the threshold voltage of the two transistors of the differential switch. Accordingly, the present invention improves the decrease in the dynamic range of the current switch basic circuit 1 dependent on the threshold of each of the two transistors in the differential switch 12 and realizes a wider output voltage range without causing deterioration in properties even in a case that the power voltage is reduced in the current switch basic circuit 1.

Abstract: In a current steering D/A converter, a 1LSB current source 1 and a 2LSB current source 2 are binary code current sources for outputting currents with current values weighted by ½, and a 4LSB current source 3 is one of a large number of current sources designed as thermometer code current source with the same structure. In first circuits A1, A2 and A4 for respectively determining constant current values of the current sources 1 through 3, a plurality of MOS transistors with a channel length L3 and a channel width W3 are cascode-connected to one another with gate terminals thereof shared. In second circuits B1, B2 and B4 respectively used for setting high output impedance of the current sources 1 through 3, a plurality of MOS transistors with a channel length L4 and a channel width W4 are cascode-connected to one another with gate terminals thereof shared.

Abstract: In a multi-channel current steering DA converter, e.g., a two-channel current steering DA converter, reference current sources Irefa and Irefb that can serve as current mirror sources for current sources Ia and Ib are provided in current source matrices 2a and 2b of the channels, respectively. During an operation, the reference current source Irefa or Irefb that is provided in the current source matrix of a channel that is not powered down is selected and used in accordance with control signals 6a and 6b. Therefore, even when one channel is powered down, the full-scale current of the other channel can be maintained at a constant value, i.e., unchanged.