Patents by Inventor Heiko Woelk

Heiko Woelk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160301414
    Abstract: A dynamic interconnect is described herein. The dynamic interconnect includes a transmit module, a receive module, and a multiplexer. Signal changes are detected in a group of transmit channels, and in response to the signal change an output of the multiplexer is switched to the channel where the change occurs.
    Type: Application
    Filed: December 28, 2013
    Publication date: October 13, 2016
    Inventors: Franz-Wilhelm Olbrich, Ralf Plate, Thorsten Mattner, Heiko Woelk
  • Patent number: 8351450
    Abstract: In one embodiment, a rate adaptation device comprises one or more input/output (I/O) ports coupled to a first network operating at a first data transmission rate, a first physical coding sublayer (PCS) receiver to receive a stream of PCS blocks from the first network, an idle symbol remover to remove a sequence of idle symbols from the first PCS block and combine the one or more non-idle PCS symbols in a buffer with one or more non-idle PCS symbols from a second PCS block to form a third PCS block, and a PCS transmitter to transmit the third PCS block to a second network operating at a second data transmission rate.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: January 8, 2013
    Assignee: Intel Corporation
    Inventors: Michael Kauschke, Michael Riepen, Heiko Woelk
  • Publication number: 20070153831
    Abstract: In one embodiment, a rate adaptation device comprises one or more input/output (I/O) ports coupled to a first network operating at a first data transmission rate, a first physical coding sublayer (PCS) receiver to receive a stream of PCS blocks from the first network, an idle symbol remover to remove a sequence of idle symbols from the first PCS block and combine the one or more non-idle PCS symbols in a buffer with one or more non-idle PCS symbols from a second PCS block to form a third PCS block, and a PCS transmitter to transmit the third PCS block to a second network operating at a second data transmission rate.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 5, 2007
    Inventors: Michael Kauschke, Michael Riepen, Heiko Woelk
  • Patent number: 7012935
    Abstract: A device, system and method for aligning data received on a plurality of data lanes in a data link are disclosed. One or more alignment vectors are generated for each of a plurality of data lanes where each alignment vector represents a location of an alignment character in an associated one of the data lanes. For each data lane, a plurality of alignment vectors may be associated with one or more alignment windows associated with the data lane. If the alignment vectors of the data lanes are associated with a common alignment window, an alignment position may be selected for each data lane.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: March 14, 2006
    Assignee: Intel Corporation
    Inventors: Heiko Woelk, Aage Fischer, Nils Hoffmann
  • Publication number: 20030214975
    Abstract: A device, system and method for aligning data received on a plurality of data lanes in a data link are disclosed. One or more alignment vectors are generated for each of a plurality of data lanes where each alignment vector represents a location of an alignment character in an associated one of the data lanes. For each data lane, a plurality of alignment vectors may be associated with one or more alignment windows associated with the data lane. If the alignment vectors of the data lanes are associated with a common alignment window, an alignment position may be selected for each data lane.
    Type: Application
    Filed: May 16, 2002
    Publication date: November 20, 2003
    Inventors: Heiko Woelk, Aage Fischer, Nils Hoffmann