Patents by Inventor Heikyung Min

Heikyung Min has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080284009
    Abstract: A conductive bump structure for an integrated circuit (IC) structure comprises a passivation layer, such as a silicon oxide/silicon nitride stack, that is formed on an upper surface of each of the conductive contact pads (e.g. Al pads) of the IC. A plurality of openings extend through the passivation layer to expose areas of the upper surface of the contact pad. The openings are larger in the longitudinal dimension than in the lateral dimension. A conductive bump, preferably comprising gold (Au), is formed on the passivation layer to extend through the openings in the passivation and into electrical contact with the exposed upper surface areas of the contact pad.
    Type: Application
    Filed: May 16, 2007
    Publication date: November 20, 2008
    Inventor: Heikyung Min
  • Patent number: 6759331
    Abstract: Drift in the reverse breakdown voltage of a surface zener diode is substantially reduced by forming a layer of material that includes titanium before or after the metallization steps that are used to form the first layer of metal (the metal-1 layer) or the second layer of metal (the metal-2 layer).
    Type: Grant
    Filed: May 15, 2003
    Date of Patent: July 6, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Heikyung Min, Steven Kurihara, Robert Spence