Abstract: Programmable monolithic integrated circuit current mirrors configured as either current sources or current sinks include mixed MOS and bipolar technology on a substrate, wherein the master and slave elements each include a silicon-based emitter resistor having a positive temperature coefficient matched to the negative temperature coefficient of the V.sub.be of an associated bipolar transistor, for making the ratios of the master element current to the individual slave element currents substantially insensitive to dynamic temperature gradients produced in the associated substrate. Each slave is independently and individually compensated.

Abstract: A current mirror amplifier (CMA) has master and slave mirroring transistors of bipolar type, input and output terminals to which the collector electrodes of the master and slave mirroring transistors respectively connect, and a common terminal to which the emitter electrodes of the mirroring transistors connect. The master mirroring transistor is provided with collector-to-base feedback for applying base potential to it which conditions its collector-to-emitter path to conduct input current applied between the common and input terminals of the CMA. The current gain of the CMA as between its input and output terminals is determined by the ratio of the transconductance of the slave mirroring transistor to that of the master mirroring transistor, whenever the base potential of the master mirroring transistor is applied to the base electrode of the slave mirroring via a transmission gate rendered transmissive responsive to a first level control potential being applied thereto.

Abstract: A composite transistor device is described which comprises a field effect transistor having its transconductance multiplied by the current gain of a current mirror amplifier. The transconductances of such devices can be matched with an accuracy approaching that with which simple field effect transistors can be matched. The higher transconductances of the composite devices make possible a variety of new circuits with distinct performance advantages.

Abstract: A ground fault detector which exhibits greater sensitivity to sensing coil current during the initial portions of a-c line voltage half-cycles than during the final portions of those half cycles. This improves its response to resistive ground faults in the presence of unbalanced capacitance to ground conditions of the a-c power lines.

Abstract: A differential amplifier suited for use in operational amplifiers employing both FET's and junction transistors has a superior gain-bandwidth product for given input offset specification. Source-coupled FET's accept input signals at their gate electrodes. Each FET is included in a composite transistor device together with a direct coupled, inverting, current amplifier having an input terminal to which the drain electrode of the FET is coupled and having an output terminal coupled to the source electrode of the FET.

Abstract: In a ground fault interrupter in which the relay switch for interrupting current through a-c lines has its actuating coil selectively connected by a controlled rectifier to receive a-c line power, a tendency towards relay switch chatter is suppressed by preventing the initiation of controlled rectifier conduction during the rapidly collapsing portions of the a-c power cycle.

Abstract: The quiescent current of a class A biased complementary field effect transistor amplifier is regulated by a bias network coupled to the gate electrodes of the output transistors which provides an offset voltage therebetween. When the amplifier supply voltage exceeds a minimum value, the bias network increases the offset voltage. Parameters of the network may be selected such that the change in offset voltage is greater than, less than or equal to the change in supply voltage. In the latter case the quiescent current is constant and the quiescent power dissipation is linearly related to the supply voltage.

Abstract: A current amplifier (CMA) having plurality of input terminals and an output terminal. Each input circuit and the output circuit of the CMA includes the conduction path of a separate one of a plurality of transistors. Means are provided for applying substantially the same potential to the control electrode of each of these transistors, which means includes an input-terminal-to-control-electrode degenerative feedback connection for each of the transistors having its conduction path in an input circuit. By including a unilaterally conductive device in such an input-terminal-to-control-electrode feedback connection, saturation of the transistor associated therewith caused by certain input current conditions is forestalled.

Abstract: Capacitance memories operated with intermittently-energized monolithic integrated circuits tend to lose information during periods between the spaced intervals the integrated-circuits are energized. This tendency, attributable to sneak conduction paths in the un-energized integrated circuit, is forestalled by inserting the channel of a field-effect transistor in series with the memory capacitance, which channel is rendered conductive when only the energizing potential is supplied to the integrated circuit.

Abstract: An enhancement mode field effect transistor having a threshold voltage, V.sub.th, is coupled at the source, gate and drain thereof, respectively, to the collector, emitter and base of a bipolar transistor having a nominal forward biased base emitter voltage, V.sub.be, satisfying the inequality V.sub.th > V.sub.be. Current, applied to the collector and emitter terminals causes a regulated voltage to be produced thereacross which is dependent on V.sub.th and independent of V.sub.be.

Abstract: Current mirror amplifiers, each using a field-effect transistor as a source follower to provide collector-to-base feedback to a first bipolar transistor to condition its collector-to-emitter path to accept an input current. A second bipolar transistor has its base-emitter circuit parallelled with base-emitter circuit of the first bipolar transistor which conditions the collector-to-emitter path of the second bipolar transistor to conduct an output current proportionally related to that in the collector-to-emitter path of the first bipolar transistor. Since the source follower supplies the base currents of the bipolar transistors without requiring any gate current, the ratio of the input to output currents is constant regardless of the current gain of the bipolar transistors.

Abstract: A dynamic current supply is connected between the emitter electrode of an output transistor and a point of reference potential, to progressively increase the magnitude of the flow of current therebetween, as the output signal at the emitter electrode approaches the point of reference potential. The dynamic current supply includes a current mirror, the output of which is in the path of and controls the flow of current. An MOS transistor, the conductivity of which is a function of the difference in potential between the operating voltage supplied to the output transistor and the output signal, supplies the input or control current to the current mirror.

Abstract: A sensing transistor has its base and emitter electrodes connected across a sensing resistor connected in series with the collector electrode of an output transistor. Whenever the collector current to the output transistor tends to exceed a predetermined value, the sensing transistor is turned on to reduce the base current being supplied from a current source to the base of the output transistor to thereby reduce this collector current to less than this value. This reduction is accomplished by diverting the excess portion of the source current through the collector-emitter current path of the sensing transistor, into the collector electrode of the output transistor.

Abstract: A network for clamping a circuit node to a voltage level when the circuit is subjected to high radiation levels. The network includes a first resistor connected in series with a first radiation responsive element between said circuit node and a first point of potential and a second resistor connected in series with a second radiation responsive element between said circuit node and a second point of potential. In response to high radiation levels, the equivalent impedance of the radiation responsive elements decreases considerably and the potential at the circuit node is clamped to a voltage which is primarily determined by the potentials applied at said first and second points and the ratio of the first and second resistors.

Abstract: The transistors of a differential amplifier are coupled at their common emitter electrode connection to a low voltage power supply terminal and at their collector electrodes through respective current sinks to a point of reference potential. The collector electrodes are maintained at a voltage level above the reference potential to permit input signal swings at the base electrodes of the transistors a comparable amount below the reference voltage level. Current sources are provided for satisfying that portion of the current demand of these sinks not furnished by the transistors. When the amplifier is connected to operate as a voltage follower, additional transistors may be provided to prevent an undesirable change in the polarity of the output signal, when the input signal swings substantially below the reference voltage level.

Abstract: A neutral ground fault detector couples oscillations from a local oscillator into the neutral conductor of an electric power transmission system whenever a ground-fault appears thereon. Oscillations appearing on the neutral conductor during ground-fault conditions are synchronously detected by homodyning them with oscillations obtained directly from the local oscillator, thereby to otain a direct-current indication of the ground fault on the neutral conductor.

Abstract: A three-terminal current amplifier having a current gain substantially independent of the forward current gains of its component FET's. First and second FET's have source electrodes connected to the common terminal of the amplifier. A third FET has its source electrode connected to the second FET drain electrode and has its gate and drain electrodes connected to the input terminal and the output terminal of the amplifier, respectively. The gate electrodes of the first and second FET's and the first FET drain electrode are coupled to the input terminal by a potential source providing an offset potential smaller than the source-to-gate potential of an FET, which permits the potentials required between the common terminal and each of the input and output terminals to be reduced as compared to prior art FET amplifiers of this sort.

Abstract: A current mirror amplifier is supplied input current through the terminal conventionally common to its input and output circuits, which input current is split into two portions related as the gain of the current mirror amplifier. Either or both of these portions may be utilized as an output current.

Abstract: The base of a first transistor is coupled through a first capacitor to the collector of a second transistor and the base of the latter is coupled through a second capacitor to the collector of the first transistor. The capacitors are alternately charged by means of first and second relatively constant current sources connected to the collectors of the first and second transistors, respectively. The charging current supplied by the first current source to the second capacitor flows into the base of the second transistor, causing it to saturate and conduct the current supplied by the second current source. The charging current supplied by the second current source to the first capacitor flows into the base of the first transistor, causing it to saturate and conduct the current supplied by the first current source.