Abstract: A process for preparing a bipolar transistor for very high frequencies is described, which is especially advantageous for the preparation of heterobipolar transistors and leads to components with low parasitic capacities and low base lead resistance. The process includes forming a structured first layer with collector zone and insulation areas surrounding the collector zone on a monocrystalline lead layer. A series of monocrystalline transistor layers are grown on the first layer over the collector zone by differential epitaxy and a series of polycrystalline layers is grown at the same time over the insulation areas. A series of polycrystalline layers is designed as a base lead.

Abstract: A method for thermal annealing of amorphous surface layers on a single-crystal semiconductor base element. The amorphous surface layer is obtained by implantation of germanium or silicon ions in a single-crystal silicon base element. Finally, the amorphous layer is doped by implantation of impurities and subjected to a three-step annealing process. During the first step of this process, the interface region between the amorphous layer and the single-crystal base element is smoothed at a temperature between 400.degree. and 460.degree. C., in the second step the amorphous layer recrystallizes at a temperature between 500.degree. and 600.degree. C., and in the third step the dopants are activated in an RTA process.

Abstract: In a process for manufacturing a semiconductor arrangement, wherein an uneven surface of the semiconductor arrangement is smoothened, there is produced on the uneven surface an insulating layer of such thickness that the insulating layer produced on the surface exhibits an even surface. The insulating layer is then partially removed again.