Abstract: The invention relates to a semiconductor arrangement made of compound semiconductor material and consists in that the semiconductor body contains in areas and, in the case of phosphide compounds throughout its entirety or in areas, isoelectronic impurities made of an element whose covalent atom radius is larger than that of the element of the compound semiconductor, which the impurity material is isoelectronic.

Abstract: The invention relates to a process for producing a junction field effect transistor in which the surface layer provided for conducting the current has a reduced cross-section in the channel area. The gist of the invention is that a photoresist mask is applied to the surface layer of the first conductivity type which is initially of uniform thickness. The surface layer is removed to a residual thickness through an opening in the photoresist mask. Impurities are then implanted into the surface layer through the same opening in the aforesaid mask to produce a zone of the second or opposite conductivity type. Finally, the aforementioned mask is used as a contacting mask for the manufacture of the gate electrode.

Abstract: The invention relates to a semiconductor arrangement consisting of a semiconductor substrate and arranged thereon a conductive semiconductor layer on which at least two ohmic connection electrodes are arranged in spaced lateral relationship to each other. The invention resides in selecting the conductive layer so thin that a depletion layer formed in the semiconductor layer between the ohmic connection electrodes produces, in the semiconductor layer, a potential distribution which acts as a majority carrier barrier.

Abstract: The mean drift speed of charge carriers in a semiconductor element can be increased if this semiconductor element has narrow layers which are alternately n-doped and p-doped on their planes, with undoped semiconductor material between these layers. A structure of this type is however difficult to manufacture, since it requires both doping zones in layer thicknesses of 2 nm and undoped semiconductor material between these doped zones. The semiconductor element in accordance with the invention therefore has successive layer sequences comprising two highly-doped layers with opposing conductivity. A weakly doped intermediate layer is arranged between each pair of layer sequences. These structures in accordance with the invention can be manufactured with MBE, LPCVD and MDVPE methods. To increase the switching frequency of pin diodes this structure in accordance with the invention can be incorporated into the intrinsic zones of these diodes.

Abstract: The invention relates to a process for the manufacture of semiconductor layers on semiconductor bodies or for the diffusion of impurities from compounds into semiconductor bodies, with fission products which are to be withdrawn during the process being formed. The gist of the invention is that the reactivity of certain fission products is increased by plasma excitation or by the supplying of photons. In particular, active hydrogen is made available for entry into a highly volatile, gaseous combination with existing fission products.

Abstract: The invention relates to an optical adjusting process for proximity printing wherein a mask is spaced at a short distance from a substrate on which an image of the mask structure is to be formed. According to the invention, a high-definition image of the structures of the mask and of the substrate is formed by means of light of differing wavelength in a common image plane. This adjusting process is intended, in particular, for X-ray lithography.

Abstract: The invention relates to a high frequency mixer stage comprising a field-effect transistor tetrode having two gate electrodes, with one gate electrode being supplied with the high frequency input signal. According to the invention, the mixer stage becomes a frequency changer by means of inductive load at the second gate electrode of the tetrode.

Abstract: A field effect transistor having a source and drain region arranged vertically in a semi-conductor body with an insulating layer separating them, a rectifying metal/semiconductor contact on a side surface of the semiconductor body to form a gate electrode, and a thin conductive layer arranged on the side surface to bridge the insulating layer at least in the region beneath the gate electrode.

Abstract: A semi-conductor arrangement comprises a current carrying channel associated with at least two drain electrodes, means being provided for exerting transverse control on the current in the channel to selectively trigger one of the drain electrodes.

Abstract: A semiconductor device including a semiconductor body having at least one ohmic electrode and at least one blocking electrode, wherein an ohmic electrode or a blocking electrode is disposed on the side surface of the semiconductor body and wherein in the case where an ohmic electrode is disposed on the side surface, the ohmic electrode has adjacent to it a blocking electrode which is on a major surface of the semiconductor body and, in the case where a blocking electrode is disposed on the side surface, the blocking electrode has adjacent to it an ohmic electrode which is on the major surface.

Abstract: A light detector arrangement comprises three semiconductor layers, one on top of another, the center layer guiding the light and the layers on opposite sides of the center layer having a lower dielectric constant, the arrangement being provided with a first detector electrode on a side surface of the layers and a second detector electrode on the outer surface of one of the outer layers, and adjacent the first electrode.