Abstract: A method and circuit for compensating variations induced by temperature, strain and manufacturing technology in CMOS video sensors. Using at least two reference CMOS sensors, held at the same temperature level as the CMOS video sensors to be compensated and which are not irradiated, two reference signals are generated whereof one corresponds to a reference dark value whilst the other one, in response to the application of an electric current, corresponds to a reference illumination value. The reference signals are amplified separately of each other. At least one correction value is stored in a memory unit for each CMOS video sensor point to be compensated, such that output signals corrected by FPN (=fixed pattern noise) will be obtained. The FPN-corrected output signals as well as the reference signals obtained are supplied to the A/D converter where the output signals of the CMOS video sensor are compensated and converted into digital signals.

Abstract: A circuitry for high-speed reading of a video cell for a video pickup chip including a plurality of such video cells disposed in the form of a two-dimensional array, and a read-out logic designed for imaging a high input signal dynamic volume onto a reduced output signal dynamic volume, wherein the photosensitive element of the video cell is connected to the first main electrode of a first MOS transistor (M0) and to the gate of a second MOS transistor (M1) such that the gate and the other main electrode of the first MOS transistor (M0) are short-circuited and applied to an invariable potential (Vpp) so as to achieve a logarithmic characteristic line, and that an output signal amplifier is connected to the second main electrode of the second MOS transistor (M1). Moreover, a method of high speed reading of this video cell is described.