Abstract: An arrangement includes a panel configured as a pre-form for manufacturing a plurality of component carriers; a protection layer covering a surface portion of a main surface of the panel, wherein the protection layer is detachable from the surface portion without leaving residues on the panel. A handling tool for handling the panel includes a surface onto which the panel is arrangeable. The panel includes a handling surface, with which the panel is arrangeable onto the handling tool, wherein the handling surface comprises at least part of the surface portion covered by the protection layer.

Abstract: An arrangement includes a panel configured as a pre-form for manufacturing a plurality of component carriers; a protection layer covering a surface portion of a main surface of the panel, wherein the protection layer is detachable from the surface portion without leaving residues on the panel. A handling tool for handling the panel includes a surface onto which the panel is arrangeable. The panel includes a handling surface, with which the panel is arrangeable onto the handling tool, wherein the handling surface comprises at least part of the surface portion covered by the protection layer.

Abstract: A multi-layered printed circuit board (1) including (a) a first section with conductive test areas (7) on at least one inner layer (2) for determining a possible misalignment of an inner layer, or a misalignment of an inner layer structuring, respectively, wherein the conductive test areas are ring structures (7.i) arranged in rows and defining inner, non-conductive areas (8.i) of various sizes, and having through-contacting bore holes (5) in the region of the test areas (7), wherein these bore holes (5) are provided in the inner, non-conductive areas (8.i) in case there is no misalignment or a negligible misalignment and (b) a second section with through-contacting bore holes (5) extending from inner layer (4) provided with test area ring structures (7.i) toward a layer (2) with a common, continuous, conductive area as contact area (11) for the bore holes (5).

Abstract: A multi-layered printed circuit board (1) including conductive test areas (7) on at least one inner layer (2) for determining a possible misalignment of an inner layer, or a misalignment of an inner layer structuring, respectively, wherein the conductive test areas include ring structures (7.i) arranged in rows and defining inner, non-conductive areas (8.i) of various sizes, and having through-contacting bore holes (5) in the region of the rest areas (7).

Abstract: The invention relates to a multi-layered printed circuit board (1) comprising conductive test surfaces (7) on at least one inner layer (2) for determining a possible misalignment of an inner layer or an inner layer structuring, the conductive test surfaces consisting of ring structures (7.i) which are arranged in a row and define inner non-conductive different-sized surfaces (8.i). The inventive printed circuit board also comprises metallised boreholes (5) in the region of the test surfaces. If there is no misalignment or only negligible misalignment, said boreholes (5) are located in the region of the inner, non-conductive surfaces (8.i). However, in the event of non-negligible misalignment, at least one borehole (5) is located in the region of one of the conductive ring structures (7.i) and thus comprises a conductive connection to the ring structure (7.i). The test surface ring structures (7.