Patents by Inventor Heinz R. Plitschka

Heinz R. Plitschka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Identifying and synchronizing permuted channels in a parallel channel bit error rate tester
    Patent number: 6961317
    Abstract: A test system that includes a generator and an analyzer acting cooperatively to test a device having a plurality of device communication channels. The device has a plurality of inputs and corresponding outputs, each input being connected to a corresponding one of the outputs. The correspondence between the input and output channels may change if the device is turned off and on or if the device is not actively sending data from the inputs to the outputs. The test system determines a mapping between the device inputs and outputs prior to performing bit error rate testing utilizing a mapping test pattern. The test system can then switch to a bit error rate test pattern without causing the device to drift such that the correspondence between the input and output channels is lost.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: November 1, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Daniel Y. Abramovitch, Michael J. Weinstein, Heinz R. Plitschka
  • Identifying and synchronizing permuted channels in a parallel channel bit error rate tester
    Publication number: 20030063566
    Abstract: A test system that includes a generator and an analyzer acting cooperatively to test a device having a plurality of device communication channels. The device has a plurality of inputs and corresponding outputs, each input being connected to a corresponding one of the outputs. The correspondence between the input and output channels may change if the device is turned off and on or if the device is not actively sending data from the inputs to the outputs. The test system determines a mapping between the device inputs and outputs prior to performing bit error rate testing utilizing a mapping test pattern. The test system can then switch to a bit error rate test pattern without causing the device to drift such that the correspondence between the input and output channels is lost.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 3, 2003
    Inventors: Daniel Y. Abramovitch, Michael J. Weinstein, Heinz R. Plitschka