Abstract: A matrix type display panel is disclosed which comprises a plurality of gate lines, a plurality of source lines normal to the gate lines, a pair of substates with one carrying a thin film transistor (TFT) array including a plurality of TFTs one for each of the intersections of the gate and source lines and the other carrying a common electrode and liquid crystal material interposed between the TFT array and the common electrode. The common electrode is supplied with the voltage of which the waveform is different between odd scanning frames and during even scanning frames. In a write mode, the source line is supplied with a pair of positive and negative pulses during the odd scanning frames and with the zero voltage during the even scanning frames. In a non-write mode, on the other hand, the source line is supplied with the zero voltage during the even scanning frames and with a pair of positive and negative pulses during the odd scanning frames.