Patents by Inventor Helder R. Carvalheira

Helder R. Carvalheira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090010246
    Abstract: A multimode home telephone system includes a computer, a base unit, a wireless handset and a wireless headset. The computer is programmed with a “soft phone” program to make and receive VOIP calls via the Internet and couple them to and from the base through a USB connection. The base is also coupled to a public switched telephone network (PSTN) and is operable to effect full duplex communication via both the PSTN and the Internet. The base, in turn, is wirelessly coupled to the handset via the DECT/UPCS protocol, and the handset is wirelessly coupled to the headset via the Bluetooth protocol, such that the user can selectively place and receive telephone calls via any one of the Internet, the PSTN or an optional Bluetooth enabled cell phone. Optionally, a DECT/UPCS enabled headset can communicate directly with the base in addition to or in lieu of the Bluetooth enabled headset.
    Type: Application
    Filed: December 11, 2006
    Publication date: January 8, 2009
    Inventors: Alan W. Grattan, Helder R. Carvalheira, Joyce R. Shimizu, Jay Wilson, Beatrice Casanova
  • Patent number: 6846149
    Abstract: A semiconductor wafer processing system including a multi-chamber module having vertically-stacked semiconductor wafer process chambers and a loadlock chamber dedicated to each semiconductor wafer process chamber. Each process chamber includes a chuck for holding a wafer during wafer processing. The multi-chamber modules may be oriented in a linear array. The system further includes an apparatus having a dual-wafer single-axis transfer arm including a monolithic arm pivotally mounted within said loadlock chamber about a single pivot axis. The apparatus is adapted to carry two wafers, one unprocessed and one processed, simultaneously between the loadlock chamber and the process chamber. A method utilizing the disclosed system is also provided.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: January 25, 2005
    Assignee: Aviza Technology, Inc.
    Inventors: Richard N. Savage, Frank S. Menagh, Helder R. Carvalheira, Philip A. Troiani, Dan L. Cossentine, Eric R. Vaughan, Bruce E. Mayer
  • Patent number: 6610150
    Abstract: A semiconductor wafer processing system including a multi-chamber module having vertically-stacked semiconductor wafer process chambers and a loadlock chamber dedicated to each semiconductor wafer process chamber. Each process chamber includes a chuck for holding a wafer during wafer processing. The multi-chamber modules may be oriented in a linear array. The system further includes an apparatus having a dual-wafer single-axis transfer arm including a monolithic arm pivotally mounted within said loadlock chamber about a single pivot axis. The apparatus is adapted to carry two wafers, one unprocessed and one processed, simultaneously between the loadlock chamber and the process chamber. A method utilizing the disclosed system is also provided.
    Type: Grant
    Filed: January 13, 2000
    Date of Patent: August 26, 2003
    Assignee: ASML US, Inc.
    Inventors: Richard N. Savage, Frank S. Menagh, Helder R. Carvalheira, Philip A. Troiani, Dan L. Cossentine, Eric R. Vaughan, Bruce E. Mayer
  • Publication number: 20020033136
    Abstract: A semiconductor wafer processing system including a multi-chamber module having vertically-stacked semiconductor wafer process chambers and a loadlock chamber dedicated to each semiconductor wafer process chamber. Each process chamber includes a chuck for holding a wafer during wafer processing. The multi-chamber modules may be oriented in a linear array. The system further includes an apparatus having a dual-wafer single-axis transfer arm including a monolithic arm pivotally mounted within said loadlock chamber about a single pivot axis. The apparatus is adapted to carry two wafers, one unprocessed and one processed, simultaneously between the loadlock chamber and the process chamber. A method utilizing the disclosed system is also provided.
    Type: Application
    Filed: November 27, 2001
    Publication date: March 21, 2002
    Applicant: Silicon Valley Group, Thermal Systems LLC.
    Inventors: Richard N. Savage, Frank S. Menagh, Helder R. Carvalheira, Philip A. Troiani, Dan L. Cossentine, Eric R. Vaughan, Bruce E. Mayer