Patents by Inventor Helene Del Puppo

Helene Del Puppo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9633846
    Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The ion-ion plasma may be used to advantage in a variety of etching processes.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: April 25, 2017
    Assignee: Lam Research Corporation
    Inventors: Alex Paterson, Do Young Kim, Gowri Kamarthy, Helene Del Puppo, Jen-Kan Yu, Monica Titus, Radhika Mani, Noel Yui Sun, Nicolas Gani, Yoshie Kimura, Ting-Ying Chung
  • Patent number: 9385003
    Abstract: Systems and methods for etching a substrate include arranging a substrate including a first structure and a dummy structure in a processing chamber. The first structure is made of a material selected from a group consisting of silicon dioxide and silicon nitride. The dummy structure is made of silicon. Carrier gas is supplied to the processing chamber. Nitrogen trifluoride and molecular hydrogen gas are supplied to the processing chamber. Plasma is generated in the processing chamber. The dummy structure is etched.
    Type: Grant
    Filed: February 16, 2015
    Date of Patent: July 5, 2016
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Ming-Shu Kuo, Qinghua Zhong, Helene Del Puppo, Ganesh Upadhyaya, Gowri Kamarthy
  • Publication number: 20160086795
    Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The ion-ion plasma may be used to advantage in a variety of etching processes.
    Type: Application
    Filed: November 30, 2015
    Publication date: March 24, 2016
    Inventors: Alex Paterson, Do Young Kim, Gowri Kamarthy, Helene Del Puppo, Jen-Kan Yu, Monica Titus, Radhika Mani, Noel Yui Sun, Nicolas Gani, Yoshie Kimura, Ting-Ying Chung
  • Patent number: 9230819
    Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The ion-ion plasma may be used to advantage in a variety of etching processes.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: January 5, 2016
    Assignee: Lam Research Corporation
    Inventors: Alex Paterson, Do Young Kim, Gowri Kamarthy, Helene Del Puppo, Jen-Kan Yu, Monica Titus, Radhika Mani, Noel Yui Sun, Nicolas Gani, Yoshie Kimura, Ting-Ying Chung
  • Publication number: 20140302678
    Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The ion-ion plasma may be used to advantage in a variety of etching processes.
    Type: Application
    Filed: February 19, 2014
    Publication date: October 9, 2014
    Inventors: Alex Paterson, Do Young Kim, Gowri Kamarthy, Helene Del Puppo, Jen-Kan Yu, Monica Titus, Radhika Mani, Noel Yui Sun, Nicolas Gani, Yoshie Kimura, Ting-Ying Chung
  • Patent number: 7682980
    Abstract: A method for etching a polysilicon gate structure in a plasma etch chamber is provided. The method initiates with defining a pattern protecting a polysilicon film to be etched. Then, a plasma is generated. Next, substantially all of the polysilicon film that is unprotected is etched. Then, a silicon containing gas is introduced and a remainder of the polysilicon film is etched while introducing a silicon containing gas. An etch chamber configured to introduce a silicon containing gas during an etch process is also provided.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: March 23, 2010
    Assignee: Lam Research Corporation
    Inventors: Helene Del Puppo, Frank Lin, Chris Lee, Vahid Vahedi, Thomas A. Kamp, Alan J. Miller, Saurabh Ullal, Harmeet Singh
  • Publication number: 20070119545
    Abstract: A semiconductor processing system is provided. The semiconductor processing system includes a chamber. The chamber includes a gas inlet, a top electrode configured to strike a plasma inside the chamber, and a support for holding a substrate. A controller configured to detect a passivation starved condition during an etching operation is provided. The controller is further configured to introduce a passivation enhancing gas through the gas inlet during the etching operation in response to detecting the passivation starved condition.
    Type: Application
    Filed: January 25, 2007
    Publication date: May 31, 2007
    Inventors: Helene Del Puppo, Frank Lin, Chris Lee, Vahid Vahedi, Thomas Kamp, Alan Miller, Saurabh Ullal, Harmeet Singh
  • Publication number: 20070117399
    Abstract: A method for etching a polysilicon gate structure in a plasma etch chamber is provided. The method initiates with defining a pattern protecting a polysilicon film to be etched. Then, a plasma is generated. Next, substantially all of the polysilicon film that is unprotected is etched. Then, a silicon containing gas is introduced and a remainder of the polysilicon film is etched while introducing a silicon containing gas. An etch chamber configured to introduce a silicon containing gas during an etch process is also provided.
    Type: Application
    Filed: January 25, 2007
    Publication date: May 24, 2007
    Inventors: Helene Del Puppo, Frank Lin, Chris Lee, Vahid Vahedi, Thomas Kamp, Alan Miller, Saurabh Ullal, Harmeet Singh
  • Patent number: 7186661
    Abstract: A method for etching a polysilicon gate structure in a plasma etch chamber is provided. The method initiates with defining a pattern protecting a polysilicon film to be etched. Then, a plasma is generated. Next, substantially all of the polysilicon film that is unprotected is etched. Then, a silicon containing gas is introduced and a remainder of the polysilicon film is etched while introducing a silicon containing gas. An etch chamber configured to introduce a silicon containing gas during an etch process is also provided.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: March 6, 2007
    Assignee: Lam Research Corporation
    Inventors: Helene Del Puppo, Frank Lin, Chris Lee, Vahid Vahedi, Thomas A. Kamp, Alan J. Miller, Saurabh Ullal, Harmeet Singh
  • Publication number: 20040175950
    Abstract: A method for etching a polysilicon gate structure in a plasma etch chamber is provided. The method initiates with defining a pattern protecting a polysilicon film to be etched. Then, a plasma is generated. Next, substantially all of the polysilicon film that is unprotected is etched. Then, a silicon containing gas is introduced and a remainder of the polysilicon film is etched while introducing a silicon containing gas. An etch chamber configured to introduce a silicon containing gas during an etch process is also provided.
    Type: Application
    Filed: June 27, 2003
    Publication date: September 9, 2004
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Helene Del Puppo, Frank Lin, Chris Lee, Vahid Vahedi, Thomas A. Kamp, Alan J. Miller