Patents by Inventor Helmut Schwalm

Helmut Schwalm has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8589765
    Abstract: A memory system having a plurality of memory cells for storing payload data and redundancy data. The memory system having a read-out circuit configured to read-out a status of the plurality of memory cells, the read-out status having payload data, redundancy data and associated reliability information. Moreover, the memory system has a data processor configured to derive the payload data from the read-out status using the reliability information.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: November 19, 2013
    Assignee: Qimonda AG
    Inventors: Michael Scheppler, Helmut Schwalm, Doris Keitel-Schulz, Xavier Veredas-Ramirez, Detlev Richter
  • Publication number: 20130305124
    Abstract: A memory system having a plurality of memory cells for storing payload data and redundancy data. The memory system having a read-out circuit configured to read-out a status of the plurality of memory cells, the read-out status having payload data, redundancy data and associated reliability information. Moreover, the memory system has a data processor configured to derive the payload data from the read-out status using the reliability information.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 14, 2013
    Inventors: Michael Scheppler, Helmut Schwalm, Doris Keitel-Schulz, Xavier Veredas-Ramirez, Detlev Richter
  • Patent number: 8533563
    Abstract: A memory system having a plurality of memory cells for storing payload data and redundancy data. The memory system having a read-out circuit configured to read-out a status of the plurality of memory cells, the read-out status having payload data, redundancy data and associated reliability information. Moreover, the memory system has a data processor configured to derive the payload data from the read-out status using the reliability information.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: September 10, 2013
    Assignee: Qimonda AG
    Inventors: Michael Scheppler, Helmut Schwalm, Doris Keitel-Schulz, Xavier Veredas-Ramirez, Detlev Richter
  • Publication number: 20090282308
    Abstract: In an embodiment, an integrated circuit having a memory cell arrangement is provided. The memory cell arrangement may include at least one memory cell, at least one error detection circuit, and a controller configured to control a read operation to read state information from the at least one memory cell by reading a memory cell state information bypassing the at least one error correction circuit, or by reading the memory cell state information and supplying it to the at least one error correction circuit.
    Type: Application
    Filed: May 9, 2008
    Publication date: November 12, 2009
    Inventors: Jan Gutsche, Michael Scheppler, Detlev Richter, Doris Keitel Schulz, Helmut Schwalm
  • Publication number: 20090244973
    Abstract: A memory system having a plurality of memory cells for storing payload data and redundancy data. The memory system having a read-out circuit configured to read-out a status of the plurality of memory cells, the read-out status having payload data, redundancy data and associated reliability information. Moreover, the memory system has a data processor configured to derive the payload data from the read-out status using the reliability information.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 1, 2009
    Inventors: Michael Scheppler, Helmut Schwalm, Doris Keitel-Schulz, Xavier Veredas-Ramirez, Detlev Richter