Abstract: A voltage supply circuit for providing an internal supply voltage in an integrated circuit is provided. The voltage supply circuit comprises a supply source for setting the internal supply voltage on a supply voltage line and a control circuit which is connected to the supply source for switching on and off the supply source. The control circuit can itself be switched off and regularly switched on again, wherein the control circuit includes a control unit in order to switch the supply source on and off in such a way that the internal supply voltage on the supply voltage line differs essentially by no more than a limit value as a result of capacitive charge storage.

Abstract: A memory component includes at least one memory bank array, a DQ region, a clock tree, and a voltage generator. The memory component is configured in a semiconductor wafer. The at least one memory bank array is configured such that data is read out of it during a read operation. The clock tree is coupled to the DQ region and is configured for driving data during the read operation. The voltage generator is coupled to at least some components of the clock tree in order to provide at least some of the components of the clock tree with an increased voltage.

Abstract: An apparatus for controlling generation of pulses for refresh operations of a memory device having a pad to transfer information and to receive signals from an external interface. The apparatus includes a switch, coupled to a current source and to the pad receiving signals from the external interface. The switch outputs one of the signals from the current source or the pad in response to a switch control signal. An oscillator is coupled to the switch and generates the refresh operation pulses in response to the output from the switch.

Abstract: A memory component includes at least one memory bank array, a DQ region, a clock tree, and a voltage generator. The memory component is configured in a semiconductor wafer. The at least one memory bank array is configured such that data is read out of it during a read operation. The clock tree is coupled to the DQ region and is configured for driving data during the read operation. The voltage generator is coupled to at least some components of the clock tree in order to provide at least some of the components of the clock tree with an increased voltage.

Abstract: An apparatus for controlling generation of pulses for refresh operations of a memory device having a pad to transfer information and to receive signals from an external interface. The apparatus includes a switch, coupled to a current source and to the pad receiving signals from the external interface. The switch outputs one of the signals from the current source or the pad in response to a switch control signal. An oscillator is coupled to the switch and generates the refresh operation pulses in response to the output from the switch.

Abstract: A memory device includes: a generator system having a number of generators that supply voltage or current to the memory device, a controller that supplies to the generator system a state control signal that commands the generators to be in an active state or a standby state, and a self-refresh oscillator that generates a self-refresh clock signal having a period suitable to refresh memory cells of the memory device. The controller uses the self-refresh clock signal to delay transitions of the state control signal from the active state to the standby state relative to corresponding state changes of at least one external signal received by the memory device.

Abstract: A random access memory including an array of single transistor memory cells and a voltage source. The voltage source is configured to receive a boosted supply voltage and a reference voltage. The voltage source is configured to provide an output voltage out of the boosted supply voltage and based on the reference voltage.

Abstract: A memory includes a power-up circuit configured to increase a first voltage to a first value with a second voltage tied to ground, reduce the first voltage from the first value to a second value with the second voltage floating to reduce the second voltage through a parasitic coupling capacitance, and pump the second voltage to reduce the second voltage to a third value with the first voltage less than the second value.

Abstract: A memory includes a power-up circuit configured to increase a first voltage to a first value with a second voltage tied to ground, reduce the first voltage from the first value to a second value with the second voltage floating to reduce the second voltage through a parasitic coupling capacitance, and pump the second voltage to reduce the second voltage to a third value with the first voltage less than the second value.

Abstract: A memory device includes: a generator system having a number of generators that supply voltage or current to the memory device, a controller that supplies to the generator system a state control signal that commands the generators to be in an active state or a standby state, and a self-refresh oscillator that generates a self-refresh clock signal having a period suitable to refresh memory cells of the memory device. The controller uses the self-refresh clock signal to delay transitions of the state control signal from the active state to the standby state relative to corresponding state changes of at least one external signal received by the memory device.

Abstract: A reference circuit that includes a first circuit configured to provide a temperature dependent current, a second circuit configured to provide a first current, and a third circuit. The third circuit is configured to provide a temperature dependent voltage based on the first current and the temperature dependent current. The temperature dependent voltage has a voltage versus temperature slope established by the third circuit and a voltage level established by the first current.

Abstract: A random access memory including an array of single transistor memory cells and a voltage source. The voltage source is configured to receive a boosted supply voltage and a reference voltage. The voltage source is configured to provide an output voltage out of the boosted supply voltage and based on the reference voltage.

Abstract: A voltage supply circuit for providing an internal supply voltage in an integrated circuit is provided. The voltage supply circuit comprises a supply source for setting the internal supply voltage on a supply voltage line and a control circuit which is connected to the supply source for switching on and off the supply source. The control circuit can itself be switched off and regularly switched on again, wherein the control circuit includes a control unit in order to switch the supply source on and off in such a way that the internal supply voltage on the supply voltage line differs essentially by no more than a limit value as a result of capacitive charge storage.

Abstract: The invention resides in a hollow rocker-arm shaft with multiple internal passages for an internal combustion engine which rocker-arm shaft consists of two shell sections forming circular segments which are welded together by a weld seam extending along the longitudinal edges of the circular segments and at least one dividing wall extends through the interior of the hollow shaft between the weld seams and divides the interior of the hollow shaft into at least two passages.

Abstract: An internal combustion engine has an induction conduit for the induction of fresh air. A section of the induction conduit extends over the cylinder head cover. In order to achieve the simplest and most operationally reliable engine space ventilation possible, the induction conduit section is provided with at least one connection stub pipe which protrudes through an opening provided in the cylinder head cover into a camshaft space. The camshaft space is connected to the induction conduit in an advantageously simple manner.

Abstract: Bolts (10, 13) of material such as fabric, supported in open-topped bearing elements (6, 14) are exchanged by apparatus comprising a carrier (24). The carrier (24) has closable openings for engagement with spindle ends (8) projecting from the bolts (10, 13). When the carrier (24) has engaged the bolts (10, 13), it is raised (arrow 28), rotated about 180.degree. (arrow 26) and lowered (arrow 28), so changing over the positions of the bolts (10, 13). For example, operations performed on a table (1) on material taken from one bolt (10) may be completed, so that bolt (10) is replaced by a further bolt (13) taken from a magazine (12), the first bolt (10) simultaneously taking the place of the second bolt (13) in the magazine.

Abstract: A bearing arrangement for the balance shafts for balancing second order inertia forces on an internal combustion engine, in which the balance shafts run parallel to the crankshaft on both longitudinal walls of the crankcase, and have the ends carrying the balance weights supported by means of journal bearings within the crankcase and having driven ends supported by means of roller bearings outside the crankcase in the region of a crankcase end wall.