Patents by Inventor Hem P. Takiar

Hem P. Takiar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5325268
    Abstract: Integrated circuits having electrical interconnection in a multi-chip module or package is provided. Connections involving topological cross overs are achieved in the absence of multi-layers of metalization or vias. A plurality of metal traces in a single metalization layer are provided. Wire bonding issued to connect pads from two or more chips to a common metalization trace. Because the wire bonds can be vertically spaced from substrate traces, crossover connections can be achieved without an unwanted contact between traces and pads. A similar scheme can be used to provide connection to substrate pads.
    Type: Grant
    Filed: January 28, 1993
    Date of Patent: June 28, 1994
    Assignee: National Semiconductor Corporation
    Inventors: Manoj F. Nachnani, Hem P. Takiar
  • Patent number: 5296743
    Abstract: A method of making an integrated circuit package is disclosed herein along with the package itself, which package is encapsulated by plastic that is caused to flow in a given direction during the package's formation. The package itself includes an IC chip having an array of chip output/input terminals, and means for supporting the chip including an array of electrically conductive leads, all of which are provided for connection with the output/input terminals of the IC chip. In addition, the overall package includes bonding wires connecting the chip output/input terminals with respective ones of the leads such that each bonding wire extends in a direction that defines an acute angle of less than 45 degrees with the given flow direction of the plastic material used to encapsulate the IC chip, support means and bonding wires. In a preferred embodiment, at least a portion and most preferably substantially all of the bonding wires are substantially parallel with the given flow direction of the plastic material.
    Type: Grant
    Filed: May 7, 1993
    Date of Patent: March 22, 1994
    Assignee: National Semiconductor Corporation
    Inventors: Luu T. Nguyen, Hem P. Takiar
  • Patent number: 5046657
    Abstract: A tape automated bonding structure (10) includes a copper flexible tape (12) with a plurality of conductive leads (14) having tips (16) arranged in a generally rectangular pattern corresponding to gold bumped contacts (18) on semiconductor die (20). The tips (16) of the conductive leads (14) are configured as bumps extending from the remainder of each conductive lead (14). The tips (16) of the conductive leads (14) are gang bonded to the bumped contacts (18) on the semiconductor die (20) by positioning the tips (16) in registration over each bumped contact and applying heat and pressure to urge the tips (16) and the bumped contacts together, thus forming a thermocompression bond. The harder copper tips (16) penetrate into the gold bumped contacts. The bumped contacts (18) and the remainder of the tips (16) that has not penetrated into the contacts (18) space the conductive leads (14) above surface (22) of the semiconductor die (20).
    Type: Grant
    Filed: January 5, 1990
    Date of Patent: September 10, 1991
    Assignee: National Semiconductor Corporation
    Inventors: Venkat Iyer, Jagdish Belani, Hem P. Takiar, Rajenda Pendse
  • Patent number: 4810620
    Abstract: An improved copper bump tape for tape automated bonding inhibits electromigration of the copper after bonding to a semiconductor device. The improved tape is characterized by the plating of a migration resistant metal onto the inner ends of connector beams of the tape. The migration resistant metal is coated onto all surfaces of the connector bump, except for the surface which is to be bonded to the semiconductor device. In this way, the surfaces of the bump which remain exposed after connection to the semiconductor are inhibited from electromigration.
    Type: Grant
    Filed: August 27, 1987
    Date of Patent: March 7, 1989
    Assignee: National Semiconductor Corporation
    Inventors: Hem P. Takiar, P. Shah Divyesh, Robert E. Hilton
  • Patent number: 4723197
    Abstract: Semiconductor devices having bonding pads formed over active regions on the device are fabricated by providing protective layers between the bonding pad and the underlying active region(s). The first protective layer is formed from a polyimide material which can absorb shock resulting from tape automated bonding of the bonding pad. The second protective layer is formed from a puncture-resistant material, such as a plasma nitride, which will prevent penetration of the bonding pad resulting from the downward force applied during tape automated bonding. The bonding pad is connected to active regions or metallization pads on the device substrate by a metal interconnect having a vertical run and a lateral run. The vertical run penetrates the protective layers as well as any passivation layers which may be present, while the lateral run provides an offset for the bonding pad. In this way, the bonding pad and the active region of the substrate will be separated by the protective layers.
    Type: Grant
    Filed: December 16, 1985
    Date of Patent: February 2, 1988
    Assignee: National Semiconductor Corporation
    Inventors: Hem P. Takiar, Thomas George
  • Patent number: 4707418
    Abstract: An improved copper bump tape for tape automated bonding inhibits electromigration of the copper after bonding to a semiconductor device. The improved tape is characterized by the plating of a migration resistant metal onto the inner ends of connector beams of the tape. The migration resistant metal is coated onto all surfaces of the connector bump, except for the surface which is to be bonded to the semiconductor device. In this way, the surfaces of the bump which remain exposed after connection to the semiconductor are inhibited from electromigration.
    Type: Grant
    Filed: June 26, 1985
    Date of Patent: November 17, 1987
    Assignee: National Semiconductor Corporation
    Inventors: Hem P. Takiar, Divyesh P. Shah, Robert E. Hilton
  • Patent number: 4684975
    Abstract: An improved metal tape for tape automated bonding provides for enhanced heat dissipation from the packaged semiconductor device. The invention includes two aspects. In the first aspect, individual metal tape leads are extended inward beyond the peripheral bonding pads of the semiconductor and over the active region of the semiconductor device. In this way, the leads are able to conduct heat away from the active region of the device. The second aspect of the invention relates to improved heat dissipation through the individual leads. The leads are flared or otherwise increased in area in the direction away from the active region of the semiconductor device to prove the radiative dissipation.
    Type: Grant
    Filed: December 16, 1985
    Date of Patent: August 4, 1987
    Assignee: National Semiconductor Corporation
    Inventors: Hem P. Takiar, Kamal N. Mehta
  • Patent number: 4595480
    Abstract: A system for electroplating metals, such as tin and solder on semiconductor lead frame strips includes a magazine for carrying the lead frames and a separate plating rack for carrying the magazines. The plating rack, which has an insulated surface, includes means for directing a current to the lead frame strips when the magazine is inserted in the plating rack. An electric coupling means is also provided for assuring that the current from the plating rack is evenly distributed among the individual lead frame strips so that uniform plating results. The magazine is suitable for transporting and storing the lead frame strips during assembly of semiconductor components, and it is unnecessary to remove the lead frame strips from the magazine for mounting on the plating rack.
    Type: Grant
    Filed: September 26, 1985
    Date of Patent: June 17, 1986
    Assignee: National Semiconductor Corporation
    Inventors: Hem P. Takiar, Jagdish Belani
  • Patent number: 4367265
    Abstract: An intergranular insulation type semiconductive ceramic having a high effective dielectric constant includes an electrically insulating dielectric layer situated in the grain boundaries of an alkaline-earth metal titanate, zirconate, or combination thereof. The alkaline-earth metals are barium, strontium, and calcium. The dielectric layer is made of a mixture of bismuth oxide (Bi.sub.2 O.sub.3) and one or more metal oxides from nickel oxide (NiO), alumina (Al.sub.2 O.sub.3), and cuprous oxide (Cu.sub.2 O).
    Type: Grant
    Filed: April 6, 1981
    Date of Patent: January 4, 1983
    Assignee: North American Philips Corporation
    Inventors: Chyang J. Yu, Hem P. Takiar