Patents by Inventor Hemang Parekh

Hemang Parekh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11356066
    Abstract: Described examples provide for digital communication circuits and systems that implement digital pre-distortion (DPD). In an example, a system includes a DPD circuit configured to compensate an input signal for distortions resulting from an amplifier. The DPD circuit includes an infinite impulse response (IIR) filter configured to implement a transfer function. The IIR filter includes a selection circuit configured to selectively output a selected parameter. The transfer function is based on the selected parameter.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: June 7, 2022
    Assignee: XILINX, INC.
    Inventors: Hongzhi Zhao, Xiaohan Chen, Hemang Parekh
  • Patent number: 11251819
    Abstract: A transmitter for a communication system comprises a digital pre-distortion (DPD) circuit configured to generate a digital intermediate signal by compensating an input signal for distortions resulting from an amplifier, and an adaptation circuitry configured to update the first parameter based on the adjustment signal, the input signal, and an output signal output by the amplifier and based on the digital intermediate signal. The DPD circuit includes an infinite impulse response filter configured to implement a transfer function based on a first parameter, and thermal tracking circuitry configured to generate an adjustment signal corresponding to a thermal change of the amplifier.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: February 15, 2022
    Assignee: XILINX, INC.
    Inventors: Hongzhi Zhao, Xiaohan Chen, Hemang Parekh, Vincent C. Barnes
  • Patent number: 10951249
    Abstract: A transmit circuit operated with time-interpolated digital pre-distortion (DPD) coefficients to improve adjacent channel power ratio (ACPR) performance during a power mode change is provided. The transmit circuit includes a DPD circuit configured to operate with a first DPD coefficient according to a first transmit power level of a transmit power amplifier of the transmit circuit. The transmit circuit further includes a DPD coefficient management engine configured to retrieve a second DPD coefficient corresponding to the second transmit power level. The transmit circuit further includes a DPD coefficient time-interpolation engine configured to compute a set of time-interpolated DPD coefficients corresponding to a set of time instants for a transient period when the transmit power amplifier is adapted to the second DPD coefficient.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: March 16, 2021
    Assignee: Xilinx, Inc.
    Inventors: Hongzhi Zhao, Vince C Barnes, Xiaohan Chen, Hemang Parekh
  • Patent number: 8572148
    Abstract: A data reorganizer for Fourier Transforms, both forward and inverse, of multiple parallel data streams input to an integrated circuit, and method for use thereof, are described. The data reorganizer has a k input commutator, for k a positive integer greater than zero; an address generator; memory buffers; and an output commutator.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: October 29, 2013
    Assignee: Xilinx, Inc.
    Inventors: Gabor Szedo, Hemang Parekh