Patents by Inventor Hemanshu Bhatt
Hemanshu Bhatt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230179002Abstract: A system for dynamically balancing power in a battery pack during charging and discharging includes a battery pack, a control unit, and a load unit. The battery pack includes one or more modules. Each module includes one or more bricks. Each brick includes one or more blocks connected either in a series configuration or in a parallel configuration. Each block includes one or more cells. The control unit is connected with the battery pack across each of the blocks for processing power from each of the blocks irrespective of a power mismatch between the blocks. The control unit dynamically balances the power in the battery pack by controlling a differential current from a block with higher state of charge (SOC) to a block of lower SOC, using one or more converters and thereby maximizing available energy of the battery pack during charging and discharging.Type: ApplicationFiled: January 30, 2023Publication date: June 8, 2023Inventors: Sunit Tyagi, Jitendra Apte, Hemanshu Bhatt, Anupam Hudait, Ranjith Nandakumar, Pooja Sharma, Dipti Kapadia, Rashmi Naroji, Bhavin Shah, Deepthi Keshavan
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Publication number: 20230049245Abstract: A battery management system for dynamically balancing power in a battery module is provided. The battery management system comprises a plurality of modules, and each of the plurality of modules comprises a plurality of bricks. Each of the plurality of bricks comprises a plurality of blocks, electrically connected in one of a series configuration or a parallel configuration and a controller assembly provided in each of the plurality of the modules. The controller assembly comprises a first converter adapted to be connected to the plurality of bricks and a second converter adapted to be connected to an external system. The controller assembly is configured to obtain a plurality of battery pack parameters from the plurality of bricks using the first converter, process the obtained plurality of battery pack parameters and determine a current level to regulate a charging or discharging of the battery pack using the second converter.Type: ApplicationFiled: August 6, 2021Publication date: February 16, 2023Inventors: Sunit Tyagi, Hemanshu Bhatt, Jitendra Apte, Anupam Hudait, Ranjith N, Santhosha Gowda, Deepthi Keshavan, Pooja Sharma
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Patent number: 11569668Abstract: A system for dynamically balancing power in a battery pack during charging and discharging includes a battery pack, a control unit, and a load unit. The battery pack includes one or more modules. Each module includes one or more bricks. Each brick includes one or more blocks connected either in a series configuration or in a parallel configuration. Each block includes one or more cells. The control unit is connected with the battery pack across each of the blocks for processing power from each of the blocks irrespective of a power mismatch between the blocks. The control unit dynamically balances the power in the battery pack by controlling a differential current from a block with higher state of charge (SOC) to a block of lower SOC, using one or more converters and thereby maximizing available energy of the battery pack during charging and discharging.Type: GrantFiled: July 14, 2020Date of Patent: January 31, 2023Assignee: IGRENENERGI, INC.Inventors: Sunit Tyagi, Jitendra Apte, Hemanshu Bhatt, Anupam Hudait, Ranjith Nandakumar, Pooja Sharma, Dipti Kapadia, Rashmi Naroji, Bhavin Shah, Deepthi Keshavan
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Publication number: 20220021221Abstract: One example provides a system for dynamically balancing power in a battery pack during charging and discharging. The system includes a battery pack, a control unit, and a load unit. The battery pack includes one or more modules. Each module includes one or more bricks. Each brick includes one or more blocks connected either in a series configuration or in a parallel configuration. Each block includes one or more cells. The control unit is connected with the battery pack across each of the blocks for processing power from each of the blocks irrespective of a power mismatch between the blocks. The control unit dynamically balances the power in the battery pack by controlling a differential current from a block with higher state of charge (SOC) to a block of lower SOC, using one or more converters and thereby maximizing available energy of the battery pack during charging and discharging.Type: ApplicationFiled: July 14, 2020Publication date: January 20, 2022Inventors: Sunit Tyagi, Jitendra Apte, Hemanshu Bhatt, Anupam Hudait, Ranjith N, Pooja Sharma, Dipti Kapadia, Rashmi Naroji, Bhavin Shah, Deepthi Keshavan
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Patent number: 11183839Abstract: Disclosed examples relate to a power conversion system configured to provide a power output from an arrangement of direct current (DC) power sources. One example power conversion system includes multiple power sources PV(n), n=1 to x, connected in a series. For each power source PV(n) for n=1 to x?1, the power conversion system includes an intermediate bidirectional voltage converter VC(n) connected to a first terminal of the power source PV(n), a first terminal of power source PV(x), and a second terminal of power source PV(1). Each intermediate bidirectional voltage converter VC(n) includes a first switch operable in a pulsed mode to boost a power output by power source PV(n) and a second switch operable in a pulsed mode to reduce a power output by power source PV(n). The power conversion system also includes a balancer VC(x) connected to the first terminal of PV(x) and to a load.Type: GrantFiled: October 10, 2017Date of Patent: November 23, 2021Assignee: IGRENENERGI, INC.Inventors: Jitendra Apte, Alok Srivastava, Hemanshu Bhatt, Sunit Tyagi, Dipti Kapadia, Vinod Kumar Singh, Bhawani Patnaik, Leah Mathew
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Publication number: 20180102646Abstract: Disclosed examples relate to a power conversion system configured to provide a power output from an arrangement of direct current (DC) power sources. One example power conversion system includes multiple power sources PV(n), n=1 to x, connected in a series. For each power source PV(n) for n=1 to x?1, the power conversion system includes an intermediate bidirectional voltage converter VC(n) connected to a first terminal of the power source PV(n), a first terminal of power source PV(x), and a second terminal of power source PV(1). Each intermediate bidirectional voltage converter VC(n) includes a first switch operable in a pulsed mode to boost a power output by power source PV(n) and a second switch operable in a pulsed mode to reduce a power output by power source PV(n). The power conversion system also includes a balancer VC(x) connected to the first terminal of PV(x) and to a load.Type: ApplicationFiled: October 10, 2017Publication date: April 12, 2018Inventors: Jitendra Apte, Alok Srivastava, Hemanshu Bhatt, Sunit Tyagi, Dipti Kapadia, Vinod Kumar Singh, Bhawani Patnaik, Leah Mathew
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Patent number: 9577548Abstract: Embodiments related to the conversion of DC power to AC power are disclosed. For example, one disclosed embodiment provides a power conversion system, comprising a plurality of direct current (DC) power sources, a plurality of power output circuits connected to one another in a parallel arrangement, each power output circuit being connected to a corresponding DC power source to receive power from the corresponding DC power source and to selectively discharge power received from the corresponding DC power source, a power combiner configured to combine power received from the plurality of power output circuits to form a combined power signal, an output stage configured to convert the combined power signal into an AC signal or a DC signal, and a controller in electrical communication with each power outlet circuit and the power combiner to control the output of power by the power converter.Type: GrantFiled: September 3, 2013Date of Patent: February 21, 2017Assignee: IgrenEnergi, Inc.Inventors: Sunit Tyagi, Hemanshu Bhatt
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Publication number: 20140030541Abstract: Passivation integration schemes and pad structures to reduce the stress gradients and/or improve the contact surface existing between the Al in the pad and the gold wire bond. One of the pad structures provides a plurality of recessed pad areas which are formed in a single aluminum pad. An oxide mesa can he provided under the aluminum pad. Another pad structure provides a single recessed pad area which is formed in a single aluminum pad, and the aluminum pad is disposed above a copper pad and a plurality of trench/via pads. Still another pad structure provides a single recessed pad area which is formed in a single aluminum pad, and the aluminum pad is disposed above a portion of a copper pad, such that the aluminum pad and the copper pad are staggered relative to each other.Type: ApplicationFiled: October 3, 2013Publication date: January 30, 2014Applicant: LSI CORPORATIONInventors: Hemanshu Bhatt, Dilip Vijay, Jayanthi Pallinti, Sey-Shing Sun, Hong Ying, Chi-Yi Kao
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Publication number: 20140008987Abstract: Embodiments related to the conversion of DC power to AC power are disclosed. For example, one disclosed embodiment provides a power conversion system, comprising a plurality of direct current (DC) power sources, a plurality of power output circuits connected to one another in a parallel arrangement, each power output circuit being connected to a corresponding DC power source to receive power from the corresponding DC power source and to selectively discharge power received from the corresponding DC power source, a power combiner configured to combine power received from the plurality of power output circuits to form a combined power signal, an output stage configured to convert the combined power signal into an AC signal or a DC signal, and a controller in electrical communication with each power outlet circuit and the power combiner to control the output of power by the power converter.Type: ApplicationFiled: September 3, 2013Publication date: January 9, 2014Applicant: igrenEnergi Semiconductor Technologies Pvt. Ltd.Inventors: Sunit Tyagi, Hemanshu Bhatt
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Patent number: 8552587Abstract: Embodiments related to the conversion of DC power to AC power are disclosed. For example, one disclosed embodiment provides a power conversion system, comprising a plurality of direct current (DC) power sources, a plurality of power output circuits connected to one another in a parallel arrangement, each power output circuit being connected to a corresponding DC power source to receive power from the corresponding DC power source and to selectively discharge power received from the corresponding DC power source, a power combiner configured to combine power received from the plurality of power output circuits to form a combined power signal, an output stage configured to convert the combined power signal into an AC signal or a DC signal, and a controller in electrical communication with each power outlet circuit and the power combiner to control the output of power by the power converter.Type: GrantFiled: July 20, 2010Date of Patent: October 8, 2013Assignee: igrenEnergi Semiconductor Technologies Pvt. Ltd.Inventors: Sunit Tyagi, Hemanshu Bhatt
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Patent number: 8552560Abstract: Passivation integration schemes and pad structures to reduce the stress gradients and/or improve the contact surface existing between the Al in the pad and the gold wire bond. One of the pad structures provides a plurality of recessed pad areas which are formed in a single aluminum pad. An oxide mesa can be provided under the aluminum pad. Another pad structure provides a single recessed pad area which is formed in a single aluminum pad, and the aluminum pad is disposed above a copper pad and a plurality of trench/via pads. Still another pad structure provides a single recessed pad area which is formed in a single aluminum pad, and the aluminum pad is disposed above a portion of a copper pad, such that the aluminum pad and the copper pad are staggered relative to each other.Type: GrantFiled: November 18, 2005Date of Patent: October 8, 2013Assignee: LSI CorporationInventors: Hemanshu Bhatt, Dilip Vijay, Jayanthi Pallinti, Sey-Shing Sun, Hong Ying, Chiyi Kao
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Publication number: 20120019072Abstract: Embodiments related to the conversion of DC power to AC power are disclosed. For example, one disclosed embodiment provides a power conversion system, comprising a plurality of direct current (DC) power sources, a plurality of power output circuits connected to one another in a parallel arrangement, each power output circuit being connected to a corresponding DC power source to receive power from the corresponding DC power source and to selectively discharge power received from the corresponding DC power source, a power combiner configured to combine power received from the plurality of power output circuits to form a combined power signal, an output stage configured to convert the combined power signal into an AC signal or a DC signal, and a controller in electrical communication with each power outlet circuit and the power combiner to control the output of power by the power converter.Type: ApplicationFiled: July 20, 2010Publication date: January 26, 2012Applicant: INSOLARE ENERGY PRIVATE LIMITEDInventors: Sunit Tyagi, Hemanshu Bhatt
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Patent number: 8076779Abstract: A pad structure and passivation scheme which reduces or eliminates IMC cracking in post wire bonded dies during Cu/Low-k BEOL processing. A thick 120 nm barrier layer can be provided between a 1.2 ?m aluminum layer and copper. Another possibility is to effectively split up the barrier layer, where the aluminum layer is disposed between the two barrier layers. The barrier layers may be 60 nm while the aluminum layer which is disposed between the barrier layers may be 0.6 ?m. Another possibility is provide an extra 0.6 ?m aluminum layer on the top barrier layer. Still another possibility is to provide an extra barrier layer on the top-most aluminum layer, such that a top barrier layer of 60 nm is provided on a 0.6 ?m aluminum layer, followed by another harrier layer of 60 nm, another aluminum layer of 0.6 ?m and another barrier layer of 60 nm.Type: GrantFiled: November 8, 2005Date of Patent: December 13, 2011Assignee: LSI CorporationInventors: Sey-Shing Sun, Jayanthi Pallinti, Dilip Vijay, Hemanshu Bhatt, Hong Ying, Chiyi Kao, Peter Burke
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Patent number: 7955919Abstract: A transistor integration process provides a damascene method for the formation of gate electrodes and gate dielectric layers. An interlayer-dielectric film is deposited prior to the gate electrode formation to avoid the demanding gap fill requirements presented by adjacent gates. A trench is formed in the interlayer-dielectric film followed by the deposition of the gate material in the trench. This process avoids the potential for damage to high-k gate dielectric layers caused by high thermal cycles and also reduces or eliminates the problematic formation of voids in the dielectric layers filling the gaps between adjacent gates.Type: GrantFiled: December 19, 2007Date of Patent: June 7, 2011Assignee: LSI CorporationInventors: David Pritchard, Hemanshu Bhatt, David T. Price
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Patent number: 7531442Abstract: Different ways to reduce or eliminate the IMC cracking issues in wire bonded parts, including: changing to more compressive dielectric films for top, R1, and R2; changing the top passivation film stacks to more compressive films; changing the low k film to a higher compressive film; reducing the R layer thickness and pattern density to reduce tensile stress; and minimizing anneal and dielectric deposition temperatures. Each of the methods can be used individually or in combination with each other to reduce overall tensile stresses in the Cu/low-k wafer thus reducing or eliminating the IMC cracking issue currently seen in the post wire bonded parts.Type: GrantFiled: November 30, 2005Date of Patent: May 12, 2009Assignee: LSI CorporationInventors: Jayanthi Pallinti, Dilip Vijay, Hemanshu Bhatt, Sey-Shing Sun, Hong Ying, Chiyi Kao, Peter Burke, Ramaswamy Ranganathan, Qwai Low
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Publication number: 20080102583Abstract: A transistor integration process provides a damascene method for the formation of gate electrodes and gate dielectric layers. An interlayer-dielectric film is deposited prior to the gate electrode formation to avoid the demanding gap fill requirements presented by adjacent gates. A trench is formed in the interlayer-dielectric film followed by the deposition of the gate material in the trench. This process avoids the potential for damage to high-k gate dielectric layers caused by high thermal cycles and also reduces or eliminates the problematic formation of voids in the dielectric layers filling the gaps between adjacent gates.Type: ApplicationFiled: December 19, 2007Publication date: May 1, 2008Applicant: LSI LOGIC CORPORATIONInventors: David Pritchard, Hemanshu Bhatt, David Price
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Publication number: 20070259518Abstract: A method of diverting void diffusion in an integrated circuit includes steps of forming an electrical conductor having a boundary in a first electrically conductive layer of an integrated circuit, forming a via inside the boundary of the electrical conductor in a dielectric layer between the first electrically conductive layer and a second electrically conductive layer of the integrated circuit, and forming a slot between the via and the boundary of the electrical conductor for diverting void diffusion in the electrical conductor away from the via.Type: ApplicationFiled: December 29, 2005Publication date: November 8, 2007Inventors: Derryl Allman, Hemanshu Bhatt, Charles May, Peter Burke, Byung-Sung Kwak, Sey-Shing Sun, David Price, David Pritchard
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Publication number: 20070254448Abstract: An integrated circuit (IC) includes one or more inductors that have magnetic flux lines substantially parallel to a generally horizontal plane of the IC. The inductor is formed in a plurality of conductor layers separated by insulating layers of the IC. Regions of highest magnetic flux density of the inductor may preferably be located near the edge of the IC. Additionally, the inductor may preferably be segmented. The over-all inductance may preferably be controlled by turning on and off selected inductors or inductor segments.Type: ApplicationFiled: June 11, 2007Publication date: November 1, 2007Inventors: Hemanshu Bhatt, Jan Fure, Derryl Allman
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Publication number: 20070155160Abstract: A method and apparatus for redirecting void diffusion away from vias in an integrated circuit design includes steps of forming an electrical conductor in a first electrically conductive layer of an integrated circuit design, forming a via between a distal end of the electrical conductor and a second electrically conductive layer of the integrated circuit design, and reducing tensile stress in the electrical conductor to divert void diffusion away from the via.Type: ApplicationFiled: December 29, 2005Publication date: July 5, 2007Inventors: Derryl Allman, Hemanshu Bhatt, Charles May, Peter Burke, Byung-Sung Kwak, Sey-Shing Sun, David Price, David Pritchard
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Publication number: 20070123024Abstract: Different ways to reduce or eliminate the IMC cracking issues in wire bonded parts, including: changing to more compressive dielectric films for top, R1, and R2; changing the top passivation film stacks to more compressive films; changing the low k film to a higher compressive film; reducing the R layer thickness and pattern density to reduce tensile stress; and minimizing anneal and dielectric deposition temperatures. Each of the methods can be used individually or in combination with each other to reduce overall tensile stresses in the Cu/low-k wafer thus reducing or eliminating the IMC cracking issue currently seen in the post wire bonded parts.Type: ApplicationFiled: November 30, 2005Publication date: May 31, 2007Inventors: Jayanthi Pallinti, Dilip Vijay, Hemanshu Bhatt, Sey-Shing Sun, Hong Ying, Chiyi Kao, Peter Burke, Ramaswamy Ranganathan, Qwai Low