Abstract: A system and method for compensating a faulty switch in a multi-level flying capacitor converter includes a converter capacitor arranged in parallel to an input, a first and second converter switches arranged respectively between first and second ends of the converter capacitor, first and second bypass switches respectively arranged in parallel to the first and second converter switches, wherein operation includes detecting a faulty converter level that includes at least one of the first and second converter switches, discharging all capacitors arranged in parallel to the input of the multi-level converter, wherein all capacitors comprise the converter capacitors and an input capacitor; closing the first and second bypass switches of the faulty converter level; adapting a modulation of the converter switches of the other converter levels; and restarting the multi-level converter.

Abstract: A flying capacitor switching cell-system includes at least two flying capacitor switching cells, wherein each of the cells comprises an arrangement of at least one semiconductor system, and wherein the cells are in parallel in an electrical circuit.

Abstract: A flying capacitor converter comprising a protection circuit includes at least two cells, each having a capacitor having a first and second DC sides, a first switch connected to the first DC side and to a capacitor of a following cell or an output circuit, and a second switch connected to the second DC side and to the capacitor of the following cell or the output circuit. During a nominal non-fault operation of the flying capacitor converter, only one of the first and second switches is in a conducting state, and during a fault operation where the first switch has a short circuit failure and the second switch has a conducting state, the protection circuit is configured to keep the second switch switched-on.

Abstract: A modulator for a flying-capacitor type multilevel converter receives, at an input, a time-variant reference signal and provides, at an output, a sequence of target levels, to provide switching signals for switching between discrete output levels of the multilevel converter according to the shape of the reference signal. The modulator determines a critical level as an intermediate output level of the multilevel converter which is closest to the level of the reference signal; and outputs only target levels corresponding to output levels different from the critical level.

Abstract: A system and method for compensating a faulty switch in a multi-level flying capacitor converter includes a converter capacitor arranged in parallel to an input, a first and second converter switches arranged respectively between first and second ends of the converter capacitor, first and second bypass switches respectively arranged in parallel to the first and second converter switches, wherein operation includes detecting a faulty converter level that includes at least one of the first and second converter switches, discharging all capacitors arranged in parallel to the input of the multi-level converter, wherein all capacitors comprise the converter capacitors and an input capacitor; closing the first and second bypass switches of the faulty converter level; adapting a modulation of the converter switches of the other converter levels; and restarting the multi-level converter.

Abstract: A modulator for a flying-capacitor type multilevel converter receives, at an input, a time-variant reference signal and provides, at an output, a sequence of target levels, to provide switching signals for switching between discrete output levels of the multilevel converter according to the shape of the reference signal. The modulator determines a critical level as an intermediate output level of the multilevel converter which is closest to the level of the reference signal; and outputs only target levels corresponding to output levels different from the critical level.

Abstract: A flying capacitor switching cell-system includes at least two flying capacitor switching cells, wherein each of the cells comprises an arrangement of at least one semiconductor system, and wherein the cells are in parallel in an electrical circuit.