Patents by Inventor Hemant Joshi

Hemant Joshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070293445
    Abstract: Stable solid, crystalline forms of elsamitrucin salts are provided that are useful in preparing anti-neoplastic parenteral formulations. Also provided are methods for treating neoplastic diseases in humans using parenteral formulations that include at least one stable elsamitrucin salt.
    Type: Application
    Filed: June 15, 2006
    Publication date: December 20, 2007
    Applicant: SPECTRUM PHARMACEUTICALS, INC.
    Inventors: Ashok Gore, Fred Defesche, Hemant Joshi, Guru Reddy, Luigi Lenaz, Paul K. Isbester, Olga V. Lapina, Grant J. Palmer, Jonathon S. Salsbury
  • Publication number: 20070148227
    Abstract: The present invention proposes a design to incorporate medicaments in the capsule shells (body and cap). Medicaments in the cap and body of the capsules may be different. Other medicaments in the form of granules, beads etc. can be filled in the capsules, which may contain medicaments capsule shell. Thus, the same capsule may contain medicaments in the core matrix and in the shell. The key advantage of incorporation of drug in the shell is to obtain a desired rate of release of the medicament, mainly for potent drugs. Other advantage is to produce a combination drug delivery system. The concept can be used for the hard gelatin, hard non-gelatin, soft gelatin and soft non-gelatin capsules. The type of medicaments can be from any class, but should be low-dose medicaments. The medicament has to be stable in capsule shell during manufacture and during appropriate storage conditions for the capsules.
    Type: Application
    Filed: December 27, 2005
    Publication date: June 28, 2007
    Inventor: Hemant Joshi
  • Publication number: 20060241078
    Abstract: The present invention relates to pharmaceutical compositions comprising an estrogen and a progestin in solution, and a teratogen suspended in the estrogen and progestin solution. The present invention also relates to methods of making and using the pharmaceutical compositions described herein.
    Type: Application
    Filed: March 16, 2006
    Publication date: October 26, 2006
    Inventors: Salah Ahmed, Sivakumar Vaithiyalingam, Hemant Joshi
  • Patent number: 7117476
    Abstract: A computer method of analyzing an integrated circuit (“IC”) masked design data, comprising grouping into a cluster areas of layers preceding a target metal layer that are suitable for milling, deleting portions of the target metal layer that do not meet minimum tool spacing requirements to produce a modified metal layer, deleting portions of the modified metal layer that do not meet minimum design rule width requirements to produce a final metal layer, and comparing the final metal layer and the cluster to identify common areas.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: October 3, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: John M. Bach, Rand B. Carawan, Hemant Joshi, David A. Thomas
  • Publication number: 20060207820
    Abstract: An invention is disclosed for having an ‘active external vehicle shield’ which deploys on detection of an ‘imminent collision’ condition. This ‘invention’ provides a shield, which is fully deployed around the vehicle before the collision happens. When the collision happens this shield absorbs most of the collision energy, resulting in reduction of the risk of injury to the occupants of the vehicle.
    Type: Application
    Filed: March 20, 2005
    Publication date: September 21, 2006
    Inventors: Hemant Joshi, Jaya Joshi
  • Publication number: 20060189878
    Abstract: An invention is disclosed for automatically generating the ‘Guided Meditation’ using the customer Preferences and Requirements. The customer Preferences and requirements if specified can be used to select meditation stages, language used for instructions, duration, and theme of meditation and ambience sounds for the entire ‘Guided Meditation’. The customer may specify the Preferences and Requirements over Internet, phone, email or postal mail and the automatically generated ‘Guided Meditation’ can be delivered as Internet download, as an email attachment or as audio CD or audiocassette by postal mail.
    Type: Application
    Filed: February 23, 2005
    Publication date: August 24, 2006
    Inventors: Hemant Joshi, Jaya Joshi
  • Publication number: 20050273745
    Abstract: A computer method of analyzing an integrated circuit (“IC”) masked design data, comprising grouping into a cluster areas of layers preceding a target metal layer that are suitable for milling, deleting portions of the target metal layer that do not meet minimum tool spacing requirements to produce a modified metal layer, deleting portions of the modified metal layer that do not meet minimum design rule width requirements to produce a final metal layer, and comparing the final metal layer and the cluster to identify common areas.
    Type: Application
    Filed: June 4, 2004
    Publication date: December 8, 2005
    Applicant: Texas Instruments Incorporated
    Inventors: John Bach, Rand Carawan, Hemant Joshi, David Thomas
  • Patent number: 6941530
    Abstract: A method of cross-mapping integrated circuit (“IC”) elements nets in a IC and/or directing a probe to points on an IC to achieve minimal interference from adjacent structures is disclosed. The method of provides a more streamlined approach than referencing points from a physical layout representation of the IC to the actual IC being tested. The improved correlation between the actual packaged IC and the layout of the IC is accomplished using artificial locator cells. Preferably, the artificial locator cells are generated from mathematical operations of the extracted version of the layout, and they further provide coordinate information for where minimal interference from adjacent structures may be accomplished. Artificial locator cells may be generated from a layout representing a hierarchical representation or alternately each element that is instantiated from a reference library may already have artificial locator cells included.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: September 6, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Hemant Joshi, David A. Thomas, John Bach, Rand B. Carawan
  • Publication number: 20040194040
    Abstract: A method of cross-mapping integrated circuit (“IC”) elements nets in a IC and/or directing a probe to points on an IC to achieve minimal interference from adjacent structures is disclosed. The method of provides a more streamlined approach than referencing points from a physical layout representation of the IC to the actual IC being tested. The improved correlation between the actual packaged IC and the layout of the IC is accomplished using artificial locator cells. Preferably, the artificial locator cells are generated from mathematical operations of the extracted version of the layout, and they further provide coordinate information for where minimal interference from adjacent structures may be accomplished. Artificial locator cells may be generated from a layout representing a hierarchical representation or alternately each element that is instantiated from a reference library may already have artificial locator cells included.
    Type: Application
    Filed: March 24, 2003
    Publication date: September 30, 2004
    Applicant: Texas Instruments Incorporated
    Inventors: Hemant Joshi, David A. Thomas, John Bach, Rand B. Carawan
  • Patent number: 6640330
    Abstract: An invention is disclosed for setup and hold time characterization in an integrated circuit cell. A setup time is obtained for a first constraint pin. A setup time is also calculated for a test point defined in the integrated circuit cell using the setup time for the first constraint pin and a first propagation delay from the first constraint pin to the test point. A setup time for a second constraint pin is determined based on the setup time for the test point and a second propagation delay from the second constraint pin to the test point. In addition to the setup time, a hold time can be obtained for the first constraint pin, and a hold time for the test point can be calculated using the hold time for the first constraint pin and the first propagation delay. Further, a hold time for the second constraint pin can be determined based on the hold time for the test point and the second propagation delay.
    Type: Grant
    Filed: April 24, 2001
    Date of Patent: October 28, 2003
    Assignee: Artisan Components, Inc.
    Inventor: Hemant Joshi