Abstract: Apparatus and Methods are disclosed for adaptively optimizing an ER filter in a readback system of a storage device, such as a disk drive. A sample value is read from the storage device and an error measure is calculated between the sample value and an ideal value. Pole parameters and zeros of the ER filter are modified to minimize the ER filter. The apparatus and methods disclosed can function with customer data to adaptively optimize the ER filter in real time during normal operation of the storage device. Furthermore, temperature compensation circuits are disclosed to compensate for temperature dependencies in the ER filter.

Abstract: A less complex maximum likelihood detector can be implemented in a partial response maximum likelihood (PRML) system without degrading system performance by saturating y values from a gain control loop to a smaller range before the y values are supplied to the maximum likelihood detector. A quantity "D" of a maximum likelihood detector operating in accordance with a partial response scheme has a particular relationship with respect to the maximum (ymax) of the y input values processed by the maximum likelihood detector. In some embodiments, y values from a gain control loop are saturated from a first larger range (defined by ymaxreal) to a second smaller range (defined by a value SAT) which is at least as great as the ymax of the ideal input signal (ymaxideal) for the partial response scheme. The saturated y values are provided to the maximum likelihood detector.

Abstract: A method and means for detecting spectral null sequences of a spectrally-constrained code at the output of a noisy communications channel by tracking the spectral content of said sequences with a Viterbi detector using an N stage trellis and mapping each spectral null sequence to a unique path of acyclic successive states and edges through said trellis by selectively outsplitting counterpart states at preselected times modulo N in said trellis such that no pair of unique paths support the same spectral null sequence.

Abstract: Apparatus and method for transmitting spectral null sequences of a spectrally-constrained code over a partial response channel. A Viterbi detector receives the sequences from the channel and has a time-varying detector trellis structure derived from a running-digital-sum (RDS) trellis structure that requires each one of a set of quasicatastrophic sequences to be generated only from a trellis state corresponding to a respective preselected unique RDS value.

Abstract: Maximum likelihood detection of a trellis code using a Viterbi detector constructed from a time-varying trellis structure that is associated with a partial response channel and consists of connected trellises with periodically repeated patterns of nodes and subtrellises of said trellises. Each subtrellis has nodes representing a current state of the channel and value of a predetermined tracked attribute. A survivor metric and a survivor sequence from a node at the end of one subtrellis are reassigned to a node at the beginning of an adjacent subtrellis having a different value of the tracked attribute for increasing minimum distance properties, reducing error event length and improving code constraints for timing and gain control. The one subtrellis and adjacent subtrellis may be within a single trellis or in adjacent trellises.

Abstract: A Viterbi decoder having a recursive processor modified to process each node in a trellis of a partial response coded signal to shift the branch metric additions over the node to effectuate compare, select, add operation order on the predecessor survivor metrics terminating in that node, to compare the metrics of the predecessor sequences terminating in the node, to select a survivor sequence, and to add the shifted branch metrics to the metric of the selected survivor sequence.

Abstract: A method and apparatus for detecting spectral null sequences of a spectrally-constrained code on a noisy communications channel. From a Viterbi detector with a trellis structure comprising a plurality of states and edges, predetermined ones of the states and edges in the trellis structure are deleted at preselected times modulo N, such as times .phi. modulo N and/or at intermediate times m modulo N, where m=.phi., thereby to create a time-varying trellis structure for limiting the maximum length of dominant error events. The deleted edges are generally those edges which would have entered or emanated from the deleted states if they were not deleted. The trellis structure may be a so-called systolic structure, in which case the spectral null sequences are preferably DC-free or Nyquist free.

Abstract: In a system for communicating primary and secondary data from a transmitter to a receiver, each of a first plurality of primary data word values is communicated by the transmitter by transmitting an individual channel symbol associated with that value, while each of at least two other primary data word values are communicated by transmitting a selected one of at least two other channel symbols associated with that primary data word value. A predetermined one of the two channel symbols associated with the first primary data word value is transmitted only when secondary data having a first value is to be communicated, and a predetermined one of the two channel symbols associated with the second primary data word value is transmitted only when secondary data having a second value is to be communicated. In the receiver, both the primary and secondary data word values are recovered from the channel symbols thus transmitted.

Abstract: An input bit sequence is encoded for transmission on a QAM carrier by dividing a scrambled version of the input sequence into groups of N consecutive bits. Each group is then subdivided into first and second subsets of r and r.sup.1 bits, where r+r.sup.1 =N. At least one of the bits in the first subset is applied to a finite state machine (such as a convolution encoder) which is arranged to expand the applied bits by at least one additional bit, in accordance with a prescribed logic arrangement. At least one bit in the second subset is processed similarly but independently, using a different finite state machine, or by time sharing a single finite state encoder. The expanded bit subsets, which include at least r+1 and r.sup.1 +1 bits, respectively, are then mapped into in-phase and quadrature symbols such that the minimum euclidean distance for an error event is larger than that obtained from an uncoded system.