Abstract: A differential sensing circuit and method for enhancing read margin of a memory device are disclosed. The differential sensing circuit includes a first current-to-voltage converter. The circuit includes a first current subtraction circuit having an erase reference cell. A first input terminal of the first current-to-voltage converter is coupled to the first current subtraction circuit. The circuit includes a second current-to-voltage converter. The circuit also includes a second current subtraction circuit having a program reference cell. A first input terminal of the second current-to-voltage converter is coupled to the second current subtraction circuit. Both the first and second current subtraction circuits are coupled to a memory access bias signal. Outputs of the first and second current-to-voltage converters are compared to generate an enhanced read margin output.

Abstract: A power-on reset (POR) circuit (200) can include a voltage divider section (202) having a first divider resistor (R21), a second divider resistor (R22), and a diode connected transistor (N22). Signal generator section (204) can include a transistor N21 that is activated according to a potential generated by voltage divider section (202). A trip point of a POR circuit (200) can be based on a difference between the threshold voltages of transistors N21 and N22, and thus less susceptible to variations in threshold voltage.