Patents by Inventor Hemanth R.S

Hemanth R.S has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8539217
    Abstract: A method to facilitate data transfer to a line replaceable unit that lacks a transmission control protocol/Internet protocol (TCP/IP) interface is provided. The method comprises interfacing a memory-processing card to the line replaceable unit. The memory-processing card includes a memory, a central processing unit module, an interface to the line replaceable unit, an interface to an access point communicatively coupled to the central processing unit module, and a bus arbitrator communicatively coupled to the memory, the central processing unit module, and the interfaces. The method also includes determining a state of the line replaceable unit at the bus arbitrator responsive to the interfacing, providing access at the bus arbitrator from the central processing unit module to the memory when the determined state of the line replaceable unit is OFF, and providing access at the bus arbitrator from the line replaceable unit to the memory when the determined state of the line replaceable unit is ON.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: September 17, 2013
    Assignee: Honeywell International Inc.
    Inventors: Thanga Anandappan, Balamurugan Manickam, Hemanth R.S
  • Publication number: 20110185207
    Abstract: A method to facilitate data transfer to a line replaceable unit that lacks a transmission control protocol/Internet protocol (TCP/IP) interface is provided. The method comprises interfacing a memory-processing card to the line replaceable unit. The memory-processing card includes a memory, a central processing unit module, an interface to the line replaceable unit, an interface to an access point communicatively coupled to the central processing unit module, and a bus arbitrator communicatively coupled to the memory, the central processing unit module, and the interfaces. The method also includes determining a state of the line replaceable unit at the bus arbitrator responsive to the interfacing, providing access at the bus arbitrator from the central processing unit module to the memory when the determined state of the line replaceable unit is OFF, and providing access at the bus arbitrator from the line replaceable unit to the memory when the determined state of the line replaceable unit is ON.
    Type: Application
    Filed: January 25, 2010
    Publication date: July 28, 2011
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Thanga Anandappan, Balamurugan Manickam, Hemanth R.S