Abstract: Methods and devices for non-thermal PCR amplification of nucleic acid sequences. An electrical potential is applied to cause non-thermal separation of strands of a double-stranded nucleic acid or double-stranded nucleic acid/primer extension product.

Abstract: Methods and devices for non-thermal PCR amplification of nucleic acid sequences. An electrical potential is applied to cause non-thermal separation of strands of a double-stranded nucleic acid or double-stranded nucleic acid/primer extension product.

Abstract: Methods and devices for non-thermal PCR amplification of nucleic acid sequences. An electrical potential is applied to cause non-thermal separation of strands of a double-stranded nucleic acid or double-stranded nucleic acid/primer extension product.

Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.

Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.

Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.

Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.

Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.

Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.

Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.

Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.

Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.

Abstract: A memory device or a logic device that uses an electronically scannable multiplexing device capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.

Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.

Abstract: A heating device for a magnetic recording head includes first and second separating layers, the first separating layer having preferably a higher or equal thermal resistance than the first separating layer, and a heater formed between the first and second separating layers. A magnetic recording head for recording on magnetic medium includes a heating device which generates a heat spot on the magnetic medium which is larger than a magnetic track width, and/or heats a portion of the magnetic recording head which is on a leading edge side of a write gap in the magnetic recording head.

Abstract: A magnetic recording disk drive has a magnetic recording head that includes first and second separating layers, and a heater formed between the first and second separating layers. The heater has a dimension such a thermal protrusion is induced in the recording head and a thermal conductance between the recording head and a recording medium is enhanced.

Abstract: The invention discloses an assembly comprising an adjustable heat flux mechanism suitable for thermally assisted information processing and control. In one embodiment, the assembly discloses a directed energy source for heating a media, a temperature sensing element for measuring/inferring the temperature of the media, and a controller for mutually positioning the energy output by the directed energy source and the media for thereby controlling the power directed to the media in accordance with the temperature sensing element.

Abstract: The invention discloses an assembly capable of writing/erasing high-density data, preferably on a phase-change recording media. A preferred embodiment of the invention features a novel thermal near-field heater that may be employed in the assembly, preferably for writing in a substantially thermal near-field mode. The invention provides advantages of writing densities greater than that of diffraction limited systems, for example, writing densities of approximately greater than 100 Gbit/inch2, and writing speeds approximately greater than 100 MHz.

Abstract: A magnetic recording disk drive has a magnetic recording head that includes first and second separating layers, and a heater formed between the first and second separating layers. The heater has a dimension such a thermal protrusion is induced in the recording head and a thermal conductance between the recording head and a recording medium is enhanced.

Abstract: An assembly for writing/reading high-density data on a recording media as a series of tags comprising a magnetic information bit pattern. The assembly includes an antenna positionable near the media; a source of electromagnetic radiation for producing an incident wave at least a portion of which can be coupled to the antenna; and, a means for coordinating a mutual positioning of the source of the electromagnetic radiation and the antenna, so that the antenna can generate a highly localized electromagnetic field in the vicinity of the media for inducing localized heating of the media. The assembly is capable of writing/erasing said high-density data by using an information signal for modulating the localized field generated in the vicinity of the media; the assembly is capable of reading by coordinating the mutual positioning of the antenna and the media.