Abstract: A plastic keypad with data entry elements and at least one display element is protected from electrostatic discharge by an assembly having an overlay substrate on which an electrically-conductive arrangement is disposed. The overlay substrate has a top side and a back side with a precisely-positioned vias formed through the substrate. A top surface of the top side is a layer of a conductive polymer. The back side is printed with at least one layer of color ink that depict a plurality of alpha-numerical and pictorial elements of the keypad. The electrically-conductive arrangement is disposed on the overlay substrate to collect electrostatic charges on the top side, transfer the electrostatic charges to the back side through the plurality of vias and drain the transferred electrostatic charges to a ground.

Abstract: A method for FFT/IFFT computation, comprising: identifying whether grouping data is needed based on data bitwidth distribution in a set of data, wherein the set of data includes data in a stage of a FFT/IFFT computation; assigning different data representations including effective bit and group index for data identified in different groups if grouping is needed, wherein data in a group have same exponent, and data in different groups have different exponents; and outputting a signal indicating the exponent; for each of a plurality of short sequence FFT/IFFT computation—decomposing data used in present short sequence FFT/IFFT computation into at least a first multi-bit part and a second multi-bit part; respectively calculating FFT/IFFT computation results for the first multi-bit part and the second multi-bit part; adding the FFT/IFFT computation results for the first and the second multi-bit part; scanning a plurality of short sequence FFT/IFFT computation added results.

Abstract: A FFT/IFFT method, comprises converting a set of reversal-order or a set of natural-order addresses of FFT/IFFT data to a set of addresses in a radix-based numeral representation; calculating sequence numbers of a plurality of memory locations for buffering a set of data for a parallel calculation, by accumulating or subtracting all digits of the set of addresses in the radix-based numeral representation and then performing a modulo operation on the accumulation or subtraction results, wherein the radix represents a length of short DFT sequence for the parallel calculation in a FFT/IFFT calculation; storing the FFT/IFFT data simultaneously and respectively into corresponding memory locations indicated by the calculated sequence numbers; and performing FFT/IFFT calculation, comprising: performing short DFT sequence calculation; repeating the short DFT sequence calculation, until the whole FFT/IFFT calculation completes.

Abstract: A FFT/IFFT method, comprises converting a set of reversal-order or a set of natural-order addresses of FFT/IFFT data to a set of addresses in a radix-based numeral representation; calculating sequence numbers of a plurality of memory locations for buffering a set of data for a parallel calculation, by accumulating or subtracting all digits of the set of addresses in the radix-based numeral representation and then performing a modulo operation on the accumulation or subtraction results, wherein the radix represents a length of short DFT sequence for the parallel calculation in a FFT/IFFT calculation; storing the FFT/IFFT data simultaneously and respectively into corresponding memory locations indicated by the calculated sequence numbers; and performing FFT/IFFT calculation, comprising: performing short DFT sequence calculation; repeating the short DFT sequence calculation, until the whole FFT/IFFT calculation completes.

Abstract: A method for FFT/IFFT computation, comprising: identifying whether grouping data is needed based on data bitwidth distribution in a set of data, wherein the set of data includes data in a stage of a FFT/IFFT computation; assigning different data representations including effective bit and group index for data identified in different groups if grouping is needed, wherein data in a group have same exponent, and data in different groups have different exponents; and outputting a signal indicating the exponent; for each of a plurality of short sequence FFT/IFFT computation—decomposing data used in present short sequence FFT/IFFT computation into at least a first multi-bit part and a second multi-bit part; respectively calculating FFT/IFFT computation results for the first multi-bit part and the second multi-bit part; adding the FFT/IFFT computation results for the first and the second multi-bit part; scanning a plurality of short sequence FFT/IFFT computation added results.