Patents by Inventor Hen-Wai Tsao

Hen-Wai Tsao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9112459
    Abstract: The present disclosure relates, according to some embodiments, to a transformer power amplifier that allows for improved Q values and increased efficiency by reducing the capacitance coupling effect between metal layers and/or sidewalls of the same layer through carefully designed conductor structures in primary and secondary loops. A transformer power amplifier comprises a substrate, a conductor, a circular coil, a first amplifier, and a second amplifier, the conductor and the circular coil disposed on the substrate. A circular coil has a first input terminal and a second input terminal, in which the first input terminal and the second input terminal are spaced apart and opposite each other to form an opening. A first amplifier is connected to a first input terminal for receiving a first signal and a second amplifier is connected to a second input terminal for receiving a second signal, wherein the first signal and the second signal are differential signals.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: August 18, 2015
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: Chieh-Jui Ho, Hen-Wai Tsao
  • Publication number: 20150042435
    Abstract: A transformer hybrid is disclosed. The transformer hybrid comprises a substrate, a first conductor, a second conductor, a first coil, and a second coil. The first conductor includes a first elongate portion having a first side and a second side. The second conductor includes a second elongate portion having a third side and a fourth side, and the orientation of the second conductor intersects with that of the first conductor. The first coil is located near the first side and the third side. The second coil is located near the first side and the fourth side. When the direction of the loading current in the first coil is the same with that in the second coil, the first conductor has an inductive electromotive force. When the direction of the loading current in the first coil is different from that in the second coil, the second conductor has another inductive electromotive force.
    Type: Application
    Filed: July 18, 2014
    Publication date: February 12, 2015
    Inventors: CHIEH-JUI HO, HEN-WAI TSAO
  • Patent number: 8937523
    Abstract: A transformer hybrid is disclosed. The transformer hybrid comprises a substrate, a first conductor, a second conductor, a first coil, and a second coil. The first conductor includes a first elongate portion having a first side and a second side. The second conductor includes a second elongate portion having a third side and a fourth side, and the orientation of the second conductor intersects with that of the first conductor. The first coil is located near the first side and the third side. The second coil is located near the first side and the fourth side. When the direction of the loading current in the first coil is the same with that in the second coil, the first conductor has an inductive electromotive force. When the direction of the loading current in the first coil is different from that in the second coil, the second conductor has another inductive electromotive force.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: January 20, 2015
    Assignee: National Taiwan University
    Inventors: Chieh-Jui Ho, Hen-Wai Tsao
  • Patent number: 8503574
    Abstract: A transmitter includes an encoding module, an adaptive hierarchical signal mapping module and a transceiver module. The encoding module receives an input signal and encodes the input signal. The input signal includes data to be transmitted. The adaptive hierarchical signal mapping module modulates the encoded signal according to one or more hierarchical level distance ratios to obtain modulated symbols. The hierarchical level distance ratio defines distances between the modulated symbols. The transceiver module generates a radio frequency signal according to the modulated symbols and transmits the radio frequency signal to an air interface.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: August 6, 2013
    Assignee: National Taiwan University
    Inventors: Jing-Shown Wu, Hen-Wai Tsao, Yang-Han Lee, Yu-Lin Shiao
  • Patent number: 8433024
    Abstract: A spread spectrum clock generator includes a triangular modulator, a delta sigma modulator, a frequency divider, and a phase lock loop. The triangular modulator generates a digital modulation signal, representing a decimal, according to a digital parallel signal, in which the spread amount is in proportion to the digital parallel signal. The delta sigma modulator, electrically connected to the triangular modulator, generates a divider divisor, including the decimal and an integer, according to the digital modulation signal. The frequency divider divides the frequency of the output signal clock according to the divider divisor to generate a divided clock signal, in which the frequency of the divided clock signal is substantially equal to a quotient result from dividing the frequency of the output clock signal with the divider divisor. The phase lock loop adjusts the frequency of the output clock signal according to the divided clock signal and a reference clock signal.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: April 30, 2013
    Assignee: National Taiwan University
    Inventors: Chia-Tseng Chiang, Hen-Wai Tsao
  • Patent number: 8406325
    Abstract: A receiver used for an orthogonal frequency-division multiplexing (OFDM) system is provided. A signal processing device receives an OFDM symbol and processes the OFDM symbol according to the OFDM symbol and a carrier frequency offset compensation coefficient to generate a processed signal. The OFDM symbol includes pilots which have been hierarchically modulated and the processed signal includes the processed pilots. A signal analysis device collects the processed pilots of the processed signal and detects carrier frequency offset to generate the carrier frequency offset compensation coefficient to the signal processing device according to the processed pilots and a plurality of target decision bit error rates. A channel detection module detects a channel response of the processed signal according to the processed pilots and compensates the processed signal to generate an output data.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: March 26, 2013
    Assignee: National Taiwan University
    Inventors: Hen-Wai Tsao, Yang-Han Lee, Yu-Lin Shiao, Jing-Shown Wu
  • Patent number: 8369389
    Abstract: A transceiver used for an orthogonal frequency-division multiplexing (OFDM) system is provided, including: a signal processing device for receiving an OFDM symbol and processing the OFDM symbol to generate a processing signal according to the OFDM symbol, wherein the OFDM symbol having pilots which have been hierarchically modulated; a pilot signal analysis device for collecting the processing pilots of the processing signal and demodulating the processing pilots to generate a plurality of levels where one of the plurality of levels comprises a plurality of refinement bits; a degree difference analysis module for generating a plurality of degree differences according to the refinement bits and detecting channel classification according to the degree differences to transmit a channel classification signal; and a channel detection module for generating and transmitting a best modulation indication signal to another transceiver to adjust modulation scheme according to the channel classification signal.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: February 5, 2013
    Assignee: National Taiwan University
    Inventors: Yang-Han Lee, Yi-Sing Hsiao, Jing-Shown Wu, Hen-Wai Tsao
  • Patent number: 8218612
    Abstract: An effective data sequence based timing error detector (EDS-TED) for baseband transmission system using Tomlinson-Harashima Precoder is disclosed. The EDS-TED extracts timing error information embedded in the received signal to build up autocorrelation between the ESD signals and minimize the mean square error between the received and desired EDS so as to improve the performance of the TED in terms of Peak-to-Peak Jitter and TED gain. Thus the quality of the received signal increases and the error rate decreases.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: July 10, 2012
    Assignee: National Taiwan University
    Inventors: Ying-Ren Chien, Hen-Wai Tsao
  • Patent number: 8149900
    Abstract: A low complexity acquisition method and a receiver implemented such a method are disclosed. In the present invention, a cyclical shifted-and-combined (CSC) code is generated by intercepting sub-codes from a full code and combining the sub-codes with an equal gain. The CSC code is correlated with a received signal to find a candidate peak. The other candidate peak(s) can be deduced accordingly. Thus, hypotheses can be significantly reduced. A true peak can be easily and rapidly found by verifying the candidate peaks.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: April 3, 2012
    Assignee: MEDIATEK Inc.
    Inventors: Dong-hong Liu, Hen-wai Tsao
  • Publication number: 20110140790
    Abstract: A frequency synthesizer includes a fractional N phase locked loop (PLL), a sigma delta modulator, a phase adjustor and an adjust signal generator. The fractional N PLL generates an output signal according to an adjusted reference signal. A frequency of the output signal is a multiple of a frequency of a reference signal. The fractional N PLL includes a crystal oscillator generating the reference signal and a divider frequency dividing the output signal according to the multiple to generate a feedback signal. The sigma delta modulator generates a control signal to adjust the multiple accordingly. The phase adjustor adjusts a phase of the reference signal according to an adjust signal to generate the adjusted reference signal. The adjust signal generator generates the adjust signal according to an accumulation result of the sigma delta modulator.
    Type: Application
    Filed: May 24, 2010
    Publication date: June 16, 2011
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Chun-Pang Wu, Hen-Wai TSAO, Jing-Shown WU
  • Publication number: 20110142106
    Abstract: A transceiver used for an orthogonal frequency-division multiplexing (OFDM) system is provided, including: a signal processing device for receiving an OFDM symbol and processing the OFDM symbol to generate a processing signal according to the OFDM symbol, wherein the OFDM symbol having pilots which have been hierarchically modulated; a pilot signal analysis device for collecting the processing pilots of the processing signal and demodulating the processing pilots to generate a plurality of levels where one of the plurality of levels comprises a plurality of refinement bits; a degree difference analysis module for generating a plurality of degree differences according to the refinement bits and detecting channel classification according to the degree differences to transmit a channel classification signal; and a channel detection module for generating and transmitting a best modulation indication signal to another transceiver to adjust modulation scheme according to the channel classification signal.
    Type: Application
    Filed: June 3, 2010
    Publication date: June 16, 2011
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Yang-Han Lee, Yi-Sing Hsiao, Jing-Shown Wu, Hen-Wai Tsao
  • Publication number: 20110096814
    Abstract: A transmitter includes an encoding module, an adaptive hierarchical signal mapping module and a transceiver module. The encoding module receives an input signal and encodes the input signal. The input signal includes data to be transmitted. The adaptive hierarchical signal mapping module modulates the encoded signal according to one or more hierarchical level distance ratios to obtain modulated symbols. The hierarchical level distance ratio defines distances between the modulated symbols. The transceiver module generates a radio frequency signal according to the modulated symbols and transmits the radio frequency signal to an air interface.
    Type: Application
    Filed: May 24, 2010
    Publication date: April 28, 2011
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Jing-Shown Wu, Hen-Wai TSAO, Yang-Han LEE, Yu-Lin SHIAO
  • Publication number: 20110051830
    Abstract: A receiver used for an orthogonal frequency-division multiplexing (OFDM) system is provided. A signal processing device receives an OFDM symbol and processes the OFDM symbol according to the OFDM symbol and a carrier frequency offset compensation coefficient to generate a processed signal. The OFDM symbol includes pilots which have been hierarchically modulated and the processed signal includes the processed pilots. A signal analysis device collects the processed pilots of the processed signal and detects carrier frequency offset to generate the carrier frequency offset compensation coefficient to the signal processing device according to the processed pilots and a plurality of target decision bit error rates. A channel detection module detects a channel response of the processed signal according to the processed pilots and compensates the processed signal to generate an output data.
    Type: Application
    Filed: February 25, 2010
    Publication date: March 3, 2011
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Hen-Wai TSAO, Yang-Han LEE, Yu-Lin SHIAO, Jing-Shown WU
  • Publication number: 20110019718
    Abstract: A spread spectrum clock generator includes a triangular modulator, a delta sigma modulator, a frequency divider, and a phase lock loop. The triangular modulator generates a digital modulation signal, representing a decimal, according to a digital parallel signal, in which the spread amount is in proportion to the digital parallel signal. The delta sigma modulator, electrically connected to the triangular modulator, generates a divider divisor, including the decimal and an integer, according to the digital modulation signal. The frequency divider divides the frequency of the output signal clock according to the divider divisor to generate a divided clock signal, in which the frequency of the divided clock signal is substantially equal to a quotient result from dividing the frequency of the output clock signal with the divider divisor. The phase lock loop adjusts the frequency of the output clock signal according to the divided clock signal and a reference clock signal.
    Type: Application
    Filed: January 26, 2010
    Publication date: January 27, 2011
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Chia-Tseng Chiang, Hen-Wai Tsao
  • Publication number: 20100254438
    Abstract: A low complexity acquisition method and a receiver implemented such a method are disclosed. In the present invention, a cyclical shifted-and-combined (CSC) code is generated by intercepting sub-codes from a full code and combining the sub-codes with an equal gain. The CSC code is correlated with a received signal to find a candidate peak. The other candidate peak(s) can be deduced accordingly. Thus, hypotheses can be significantly reduced. A true peak can be easily and rapidly found by verifying the candidate peaks.
    Type: Application
    Filed: April 2, 2009
    Publication date: October 7, 2010
    Applicants: MEDIATEK INC., National Taiwan University
    Inventors: Dong-hong Liu, Hen-wai Tsao
  • Patent number: 7724839
    Abstract: A multilevel LINC transmitter. The multilevel LINC transmitter comprises a multilevel signal component separator, a phase modulator block, and an RF block. The multilevel signal component separator comprises a multilevel scaler and converts a base band signal to constant envelope signals. The phase modulator block is coupled to the multilevel signal component separator. The RF block comprises a plurality of power amplifiers coupled to the phase modulator block and the multilevel scaler and a power combiner coupled to the power amplifiers.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: May 25, 2010
    Assignee: Mediatek Inc.
    Inventors: Yuan-Jyue Chen, Kai-Yuan Jheng, An-Yeu Wu, Hen-Wai Tsao, Posen Tseng
  • Publication number: 20100054318
    Abstract: An effective data sequence based timing error detector (EDS-TED) for baseband transmission system using Tomlinson-Harashima Precoder is disclosed. The EDS-TED extracts timing error information embedded in the received signal to build up autocorrelation between the ESD signals and minimize the mean square error between the received and desired EDS so as to improve the performance of the TED in terms of Peak-to-Peak Jitter and TED gain. Thus the quality of the received signal increases and the error rate decreases.
    Type: Application
    Filed: March 12, 2009
    Publication date: March 4, 2010
    Inventors: Ying-Ren Chien, Hen-Wai Tsao
  • Publication number: 20080019459
    Abstract: A multilevel LINC transmitter. The multilevel LINC transmitter comprises a multilevel signal component separator, a phase modulator block, and an RF block. The multilevel signal component separator comprises a multilevel scaler and converts a base band signal to constant envelope signals. The phase modulator block is coupled to the multilevel signal component separator. The RF block comprises a plurality of power amplifiers coupled to the phase modulator block and the multilevel scaler and a power combiner coupled to the power amplifiers.
    Type: Application
    Filed: June 4, 2007
    Publication date: January 24, 2008
    Applicants: MEDIATEK INC., NATIONAL TAIWAN UNIVERISTY
    Inventors: Yuan-Jyue Chen, Kai-Yuan Jheng, An-Yeu Wu, Hen-Wai Tsao, Posen Tseng
  • Publication number: 20070174638
    Abstract: A method used for digital right management (DRM) of system-on-chip (SOC) IP by making use of a system platform, which provides an encryption & protection mechanism created by incorporating the IP designer, the IP supplier, the wafer manufacturer, the customer, and the electronic design automation (EDA) tool, thus establishing an integral and efficient SOC IP management and protection platform. In this method, the IP core hardware program codes are protected through incorporating an IP identification code (comprising a general ID code and a security ID code) into the behavior design level of the IP core hardware program codes and utilizing a public key encryption protection of the SOC IP. Therefore, through such a kind of encryption, the customer is not able to perceive the existence of the IP identification code.
    Type: Application
    Filed: January 20, 2006
    Publication date: July 26, 2007
    Inventors: Yu-Cheng Fan, Hen-Wai Tsao
  • Patent number: 6990095
    Abstract: A self-routing data switching system is disclosed. The data switching system includes a plurality of repetitive switching matrix planes, each of which is electrically connected between a less number of input terminals and a larger number of output terminals, thereby reducing the head-of-line blocking effect. Each switching matrix plane includes a switching element array interconnected between the input ports and the output ports for determining whether the data packet from an input port can be transmitted to a designated output port. The data switching system further includes a plurality of pre-processors to manage the input timing of data packets into the switching matrix array in order to avoid output conflict.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: January 24, 2006
    Assignee: National Taiwan University
    Inventors: Jingshown Wu, Kun-Tso Chen, Hen-Wai Tsao