Abstract: The invention relates to a network comprising a plurality of network nodes and one star node, which star node is provided for the direct coupling of at least two network nodes. The star node comprises a plurality of star interfaces which are assigned to at least one network node and which comprise each an activity detector for detecting activities in the message signal coming from the assigned network node and for transferring the message signal from the assigned network node to the other star interfaces or from another star interface to the assigned network node in dependence on at least one activity.

Abstract: The present invention relates to a method and a circuit arrangement for protecting a connection terminal (CANH, CANL) of a semiconductor device against electrostatic discharge (ESD), wherein first and second common nodes (N1, N2) protected against ESD of respective first and second polarities are provided. Connection terminals are coupled via first diode means (D5, D6) to the first common node and via second diode means (D7, D8) to the second common node. Thus, several terminals or pins can share the same ESD protection device by connecting them to the first and second common nodes. Due to the fact that a diode requires a smaller chip area than a protection diode, the total chip area can be reduced.

Abstract: Line driver for a LIN-bus. The line driver has a current source output transistor (T1) for pulling down the LIN-bus wire (LB) to ground (GND). The LIN-bus wire (LB) is connected to a positive supply voltage (VBAT) through a pull-up resistor (R1). The output transistor (T1) is driven by a driver stage (DRV) in response to an input current (J1) at an input node (X). The driver stage has a further resistor (R2) connected between the gate of the output transistor (T1) and a reference terminal (GND), a reference transistor (T2) which has its source connected to the reference terminal (GND) and its drain coupled to the input node (X); the gates of the output transistor (T1) and the reference transistor (T2) are connected to an output (DAO1) of a differential amplifier (DA1) which has an inverting input (DAN1) coupled to a bias voltage source (E2) and a non-inverting input (DAP1) coupled to the input node (X).

Abstract: The communication bus system comprises a plurality of node circuits (10a-d) and a relay circuit (12, 14, 16) coupling the node circuits (10a-d). The relay circuit (12, 14, 16) has a transceiver circuit (124, 164) for relaying messages (21) between the node circuits (10a-d) in a normal mode. The transceiver circuit (124, 164) is powered down in a sleep mode. A detector circuit (120, 160) detects an incoming message (41) when the relay circuit (12, 14, 16) is in a sleep mode. A mode control circuit (122, 162) powers up the transceiver (124, 164) in response to detection of an incoming message (21). Steps are taken that ensure, in the normal mode, that messages (21) will not be relayed in unreadable form. The mode control circuit (122, 162) is arranged to cause the transceiver (124, 164) to relay a remainder (25) of the incoming message (21) after power up.

Abstract: Line driver for a LIN-bus. The line driver has a current source output transistor (T1) for pulling down the LIN-bus wire (LB) to ground (GND). The LIN-bus wire (LB) is connected to a positive supply voltage (VBAT) through a pull-up resistor (R1). The output transistor (T1) provides a ramp shaped output current under control of a ramp generator (RG). The ramp shaped output current in combination with the pull-up resistor (R1) asserts a ramp shaped output voltage on the LIN-bus wire (LB). According to the LIN-bus specifications the resistance of the pull-up resistor may vary between 500 Ohm and 1 kOhm. When the resistance is 1 kOhm, the output voltage is clamped to signal ground (GND) and a delay occurs between the edge in the data signal (TXD) and the corresponding rising ramp in the output voltage.

Abstract: A line driver for driving a two-wire communication bus (8, 9) consisting of a chain of inverters (I1, . . . , I6). Each inverter may consist of a series arrangement of a PMOS (M1) and an NMOS (M2) transistor. The output terminals (1b, 3b, 5b) of the odd-numbered inverters (I1, I3, I5) are connected to the first wire (8) of the bus through respective first resistors (R1, R3, R5) and the output terminals (2b, 4b, 6b) of the even-numbered inverters (I2, I4, I6) are connected to the second wire (9) of the bus through respective second resistors (R2, R4, R6). Owing to the propagation delay of the inverters and the additive effect of the resistors the voltages on the bus wires change only in successive small steps. This results in a small common mode voltage on the bus wires and, consequently, a low electromagnetic emission.

Abstract: A fault tolerant air bag system needs a floating supply, which supply conventionally is made by means of a DC-DC converter with a transformer. By splitting the main energy reserve capacitor (14) into two capacitors (14, 34), and coupling one of the capacitors (34) to the other (14) by means of switches (36, 38) which open during a crash, no transformer is needed any more.

Abstract: Line driver for a LIN-bus. The line driver has a current source output transistor (T1) for pulling down the LIN-bus wire (LB) to ground (GND). The LIN-bus wire (LB) is connected to a positive supply voltage (VBAT) through a pull-up resistor (R1). The output transistor (T1) is driven by a driver stage (DRV) in response to an input current (J1) at an input node (X). The driver stage has a further resistor (R2) connected between the gate of the output transistor (T1) and a reference terminal (GND), a reference transistor (T2) which has its source connected to the reference terminal (GND) and its drain coupled to the input node (X); the gates of the output transistor (T1) and the reference transistor (T2) are connected to an output (DAO1) of a differential amplifier (DA1) which has an inverting input (DAN1) coupled to a bias voltage source (E2) and a non-inverting input (DAP1) coupled to the input node (X).

Abstract: Line driver for a LIN-bus. The line driver has a current source output transistor (T1) for pulling down the LIN-bus wire (LB) to ground (GND). The LIN-bus wire (LB) is connected to a positive supply voltage (VBAT) through a pull-up resistor (R1). The output transistor (T1) provides a ramp shaped output current under control of a ramp generator (RG). The ramp shaped output current in combination with the pull-up resistor (R1) asserts a ramp shaped output voltage on the LIN-bus wire (LB). According to the LIN-bus specifications the resistance of the pull-up resistor may vary between 500 Ohm and 1 kOhm. When the resistance is 1 kOhm, the output voltage is clamped to signal ground (GND) and a delay occurs between the edge in the data signal (TXD) and the corresponding rising ramp in the output voltage.

Abstract: In a network a star node (SN1) interconnects a plurality of stations (ST1-ST3). The star node (SN1) has interfaces (I1-I3), each having a connection terminal (BP) for connecting a selected one of the stations to the star node (SN1) and each interface receives at a connection terminal (BP) a signal from the station associated with that interface and forwards the received signal to the connection terminal (BP) of the other interfaces.

Abstract: A line driver for driving a two-wire communication bus (8, 9) consisting of a chain of inverters (I1, . . . , I6). Each inverter may consist of a series arrangement of a PMOS (M1) and an NMOS (M2) transistor. The output terminals (1b, 3b, 5b) of the odd-numbered inverters (I1, I3, I5) are connected to the first wire (8) of the bus through respective first resistors (R1, R3, R5) and the output terminals (2b, 4b, 6b) of the even-numbered inverters (I2, I4, I6) are connected to the second wire (9) of the bus through respective second resistors (R2, R4, R6).

Abstract: A demodulator of an evaluating unit for a device for detecting objects derives a useful signal from a supplied input signal with the aid of a carrier signal. The demodulator further derives a test signal with the aid of a modulated carrier signal. An evaluator detects as a function of the useful signal whether an object is being detected and, as a function of the test signal the functionality of the device.

Abstract: A ballast circuit for operating a lamp provided with a voltage-current converter, the ballast circuit having a differential amplifier provided with a first input terminal for connection to a reference voltage source for generating a reference voltage, a second input terminal for connection of a reference resistor, and an output. A first current generator supplies a first current to the reference resistor. A current amplifier generates a second current and is provided with an input coupled to the output of the differential amplifier. The differential amplifier is provided with a low-pass filter. The current amplifier on the one hand and the current generator and the reference resistor on the other hand exclusively comprise mutually separate components. The ballast circuit is in addition provided with a current control circuit coupled to the current amplifier and to the current generator for influencing the first current dependent upon the second current.

Abstract: An electronic circuit having first (VSS) and second (VDD) power supply terminals and comprising a first digital driver (DRV) and a further digital driver (DRVF). The digital drivers (DRV, DRVF) are arranged for driving capacitive loads such as charge pump capacitors (CP1, CP2) of a charge pump (CHGP). The first digital driver (DRV) comprises a first field effect transistor (T1) having a source coupled to the first power supply terminal (VSS), a drain coupled for driving the first charge pump capacitor (CP1), and a gate; a second field effect transistor (T2) having a source coupled to the second power supply terminal (VDD), a drain coupled to the drain of the first field effect transistor (T1), and a gate; a first capacitor (C1) coupled between the gate of the first field effect transistor (T1) and an input terminal (CLK) for receiving a digital input signal (UCLK); and a second capacitor (C2) coupled between the gate of the second field effect transistor (T2) and the input terminal (CLK).

Abstract: The invention relates to a network comprising a plurality of network nodes and one star node, which star node is provided for the direct coupling of at least two network nodes. The star node comprises a plurality of star interfaces which are assigned to at least one network node and which comprise each an activity detector for detecting activities in the message signal coming from the assigned network node and for transferring the message signal from the assigned network node to the other star interfaces or from another star interface to the assigned network node in dependence on at least one activity.

Abstract: A fault tolerant air bag system needs a floating supply, which supply conventionally is made by means of a DC-DC converter with a transformer. By splitting the main energy reserve capacitor (14) into two capacitors (14, 34), and coupling one of the capacitors (34) to the other (14) by means of switches (36, 38) which open during a crash, no transformer is needed any more.

Abstract: The common mode component in the difference signal on the bus terminals (2, 4) of a CAN bus is counteracted by four transistors (M1-M4) connected between the supply terminals (28, 32) and a center tap (16) of a voltage divider (6A, 6B, 8, 10, 12A, 12B) between the bus terminals (2, 4). As a result of this, the voltage on the center tap (16) varies to a substantially smaller extent or not at all. Thus, it is possible to use a simpler differential amplifier (20) having a smaller common mode swing at the inputs (22, 24). Moreover, the attenuation factor selected for the voltage divider can be smaller, as a result of which a higher difference voltage is available for the differential amplifier (20).

Abstract: An electronic circuit having first (VSS) and second (VDD) power supply terminals and comprising a first digital driver (DRV) and a further digital driver (DRVF). The digital drivers (DRV, DRVF) are arranged for driving capacitive loads such as charge pump capacitors (CP1, CP2) of a charge pump (CHGP). The first digital driver (DRV) comprises a first field effect transistor (T1) having a source coupled to the first power supply terminal (VSS), a drain coupled for driving the first charge pump capacitor (CP1), and a gate; a second field effect transistor (T2) having a source coupled to the second power supply terminal (VDD), a drain coupled to the drain of the first field effect transistor (T1), and a gate; a first capacitor (C1) coupled between the gate of the first field effect transistor (T1) and an input terminal (CLK) for receiving a digital input signal (UCLK); and a second capacitor (C2) coupled between the gate of the second field effect transistor (T2) and the input terminal (CLK).

Abstract: Bus driver having a P-channel output transistor (T1) for driving a first bus terminal (6) from a positive supply terminal (2), an N-channel output transistor (T2) for driving a second bus terminal (12) from a negative supply terminal (4), a P-channel driver transistor (T3) and an N-channel driver transistor (T4) series connected between the positive (2) and the negative (4) supply terminal. The control electrodes of the P-channel transistors (T1, T3) are interconnected and the control electrodes of the N-channel transistors (T2, T4) are interconnected to obtain a fixed relationship between the currents through the P-channel transistors (T1, T3) and through the N-channel transistors (T2, T4). The conduction of the driver transistors (T3, T4) is controlled by two floating control voltage sources (22, 24) which are connected between the interconnection node (20) of the driver transistors (T3, T4) and the respective control electrodes of the driver transistors.

Abstract: In a transmission system a transmitter (12) is coupled to a receiver (13) via a transmission line comprising two wires (1,2). The transmitter (12) generates on said wires two voltages with respect to a reference voltage being opposite in phase. To enable the transmission system to operate in case of a short circuit between the wires (1,2), said two voltages are generated by sources having different short circuit currents.