Abstract: The absence of a memory matrix in full frame CCD imagers renders it difficult to convert an image with a sufficiently high frame rate for displaying it again in a satisfactory manner on, for example, an LCD screen. To eliminate this disadvantage, an image is projected on a segment of the imaging matrix in an embodiment of the invention and, after the integration period, is stored in an adjoining, separately controllable segment which is used as a memory during the read-out while in the first segment a fresh image is received and converted into electric charge. During the transfer of the information from the first to the second segment, empty lines are formed between the lines containing information, in which empty lines compensation charge is formed during the charge storage which can be subtracted from the signals so as to compensate for the smear added to the signals during storage in the--exposed--second segment.

Abstract: The invention relates to a CCD having a diode cut-off input, a reference voltage being applied to the input diode and the input signal being supplied to an input gate located in front of the first clock electrode. If the electrodes are composed of a transfer part and a storage part with an incorporated potential difference, it is possible that incomplete charge transport may occur from the input to the first clock electrode. In order to avoid this incomplete charge transport and/or to be able to enlarge the dynamic range of the input signal, a larger clock voltage, for example 10 V, is applied to the first clock electrode than to the following clock electrodes, which receive, for example, 5 V. In a preferred embodiment, the 5 V clock voltage can be supplied for this purpose by a boots-trap circuit ot the first clock electrode.

Abstract: The invention relates to a CCD having a so-called diode cut-off input, in which the input diode is applied to a reference voltage and the input signal is supplied to the input gate located in front of the first clock electrode. More particularly, if the electrodes are composed of a transfer part and a storage part with an incorporated potential difference, it is possible that, when charge is transported from the input gate to the first clock electrode, a large amount of charge is left behind. In order to avoid this and/or to be able to enlarge the dynamic range of the input signal, a MOST switch controlled by the same clock voltage as the first clock electrode is arranged between the input gate and a reference voltage, for example ground. This switch becomes conducting when the charge is transferred, as a result of which the potential level below the input gate can be adjusted above the surface potential below the transfer part of the first clock electrode.