Abstract: The invention provides a random access memory which consists of a plurality of recirculating sub-memories each having a fixed number of cells for volatile information storage and a further cell, also for volatile information storage, which is connected to the output thereof. The cells may be constructed according to LSI technique. Under the control of a circulating counter, each further cell is connected to an output of a rewrite amplifier which is connected in the recirculating loop of a sub-memory. The information of the further cell is accessible at random by a selection device and is regenerated once per cycle of the sub-memory. Thus, an advantageous compromise is obtained between the features of serially operating memories and random access memories, without an expensive additional buffer being required.