Patents by Inventor Hendrik Thomas Mau

Hendrik Thomas Mau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Systems and methods for semiconductor voltage drop analysis
    Patent number: 9171113
    Abstract: Methods and systems are provided for computing IR drop, i.e., voltage drop, in a semiconductor device. The method includes generating a modeling element corresponding to the plurality of transistors. At least one of the transistors in the modeling element is replaced with a current source. The method also includes performing an IR drop analysis of the modeling element utilizing a software program to calculate the IR drop in the semiconductor device.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: October 27, 2015
    Assignee: GLOBALFOUNDRIES, INC.
    Inventors: Torsten Schaefer, Dirk Fimmel, Hendrik Thomas Mau
  • SYSTEMS AND METHODS FOR SEMICONDUCTOR VOLTAGE DROP ANALYSIS
    Publication number: 20140359551
    Abstract: Methods and systems are provided for computing IR drop, i.e., voltage drop, in a semiconductor device. The method includes generating a modeling element corresponding to the plurality of transistors. At least one of the transistors in the modeling element is replaced with a current source. The method also includes performing an IR drop analysis of the modeling element utilizing a software program to calculate the IR drop in the semiconductor device.
    Type: Application
    Filed: June 3, 2014
    Publication date: December 4, 2014
    Applicant: GLOBALFOUNDRIES, Inc.
    Inventors: Torsten Schaefer, Dirk Fimmel, Hendrik Thomas Mau
  • System and method for generating a wire model
    Patent number: 8584066
    Abstract: An exemplary embodiment of a system and a method for generating a wire model is provided. The system comprises a processor coupled to a display device, a user input device, and a storage device. The processor is configured to (1) generate a wire configuration file, (2) determine parasitic component values from the wire configuration file, and (3) construct a table model from the parasitic component values.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: November 12, 2013
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: Hendrik Thomas Mau, Guntram Jummel