Abstract: A lateral DMOST with a drain extension 8 and a source contact entirely which overlaps the gate and thus forms a screen between the gate and the drain. The source contact 15 does not overlap the poly gate 9 but lies entirely laterally of this gate. The gate itself is provided with a low-ohmic metal contact strip 18, which results in a low gate resistance. A metal screening strip 20 is provided between this gate contact strip and the metal drain contact 16, which screening strip is connected to the source contact 15 next to the tips of the contact strip 18. Said screening strip leads to a major improvement in the power gain at high frequencies, for example in the RF range. The screening strip 20 may be realized together with the source, drain, and gate contacts in a common metal layer.

Abstract: An amplifier having an inductive coupling (LL) via which a load (Z1) may be coupled between the two main current terminals (E,C) of a transistor (QA). A capacitive coupling (CC) is also provided between the two main current terminals (E,C). The inductive coupling (LL) and the capacitive coupling (CC) provide, between the two main current terminals (E,C), respective impedances (ZLL, ZCC). To achieve a satisfactory performance in terms of signal distortion and gain, impedances (ZLL, ZCC) are substantially equal in magnitude in at least a portion of a frequency range throughout which the amplifier provides gain. The amplifier is particularly suitable for cable-network applications.

Abstract: A lateral MOS transistor is described, in particular, though not exclusively, a transistor of the lateral DMOS type, in which the drain is provided with a weakly doped drain extension (8) to increase the breakdown voltage. This drain extension is also present at the ends of the drain digits, so that the "hard" drain (5) does not continue up to the edge (7) of the active region (6), but is separated therefrom by an interposed region. These regions do not contribute to the transistor effect. To reduce parasitic input capacitances, which correspond to these non-active regions, the gate poly (9) is provided in the active portion of the transistor only and is replaced in the non-active portions by poly (22) which is connected through to the source (4, 16). This poly acts as a gate which is permanently at 0 V, so that leakage currents in the non-active regions are prevented.