Patents by Inventor Heng-Cheng Chu

Heng-Cheng Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11476572
    Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: October 18, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Yuan Shih, Chih-Hsien Chiu, Yueh-Chiung Chang, Tsung-Li Lin, Chi-Pin Tsai, Chien-Cheng Lin, Tsung-Hsien Tsai, Heng-Cheng Chu, Ming-Fan Tsai
  • Publication number: 20200161756
    Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.
    Type: Application
    Filed: January 23, 2020
    Publication date: May 21, 2020
    Inventors: Chih-Yuan Shih, Chih-Hsien Chiu, Yueh-Chiung Chang, Tsung-Li Lin, Chi-Pin Tsai, Chien-Cheng Lin, Tsung-Hsien Tsai, Heng-Cheng Chu, Ming-Fan Tsai
  • Patent number: 10587041
    Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: March 10, 2020
    Assignee: Silicon Precision Industries Co., Ltd.
    Inventors: Chih-Yuan Shih, Chih-Hsien Chiu, Yueh-Chiung Chang, Tsung-Li Lin, Chi-Pin Tsai, Chien-Cheng Lin, Tsung-Hsien Tsai, Heng-Cheng Chu, Ming-Fan Tsai
  • Patent number: 10587037
    Abstract: An electronic package structure is provided, including a substrate, a package encapsulant disposed on the substrate, and an antenna structure corresponding to a disposing area of the package encapsulant and having a first extension layer, a second extension layer disposed on the substrate, and a connection portion disposed between and electrically connected to the first extension layer and the second extension layer. Through the formation of the antenna structure on the disposing area of the package encapsulant, the substrate is not required to be widen, and, as such, the electronic package structure meets the miniaturization requirement.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: March 10, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Chien-Cheng Lin, Tsung-Hsien Tsai, Chao-Ya Yang, Yude Chu
  • Patent number: 10230152
    Abstract: An electronic package is provided, which includes: a substrate; at least an electronic element disposed on the substrate; an antenna structure disposed on the substrate; and an encapsulant formed on the substrate for encapsulating the electronic element and the antenna structure. Therein, the antenna structure has an extension portion and a plurality of support portions connected to the extension portion for supporting the extension portion over the substrate so as to save the surface area of the substrate, thereby meeting the miniaturization requirement of the electronic package.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: March 12, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Chien-Cheng Lin, Tsung-Hsien Tsai, Chao-Ya Yang
  • Patent number: 10199731
    Abstract: An electronic component is provided, which includes a substrate having opposite first and second surfaces and an antenna structure combined with the substrate. The antenna structure has at least a first extending portion disposed on the first surface of the substrate, at least a second extending portion disposed on the second surface of the substrate, and a plurality of connecting portions disposed in the substrate for electrically connecting the first extending portion and the second extending portion. Any adjacent ones of the connecting portions are connected through one of the first extending portion and the second extending portion. As such, the antenna structure becomes three-dimensional. The present invention does not need to provide an additional region on the substrate for disposing the antenna structure, thereby reducing the width of the substrate so as to meet the miniaturization requirement of the electronic component.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: February 5, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Cheng-Yu Chiang
  • Patent number: 9997477
    Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: June 12, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Tsung-Hsien Tsai, Heng-Cheng Chu, Chien-Cheng Lin, Chih-Hsien Chiu, Hsin-Lung Chung, Yude Chu
  • Publication number: 20180090835
    Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.
    Type: Application
    Filed: May 16, 2017
    Publication date: March 29, 2018
    Inventors: Chih-Yuan Shih, Chih-Hsien Chiu, Yueh-Chiung Chang, Tsung-Li Lin, Chi-Pin Tsai, Chien-Cheng Lin, Tsung-Hsien Tsai, Heng-Cheng Chu, Ming-Fan Tsai
  • Publication number: 20170187117
    Abstract: An electronic component is provided, which includes a substrate having opposite first and second surfaces and an antenna structure combined with the substrate. The antenna structure has at least a first extending portion disposed on the first surface of the substrate, at least a second extending portion disposed on the second surface of the substrate, and a plurality of connecting portions disposed in the substrate for electrically connecting the first extending portion and the second extending portion. Any adjacent ones of the connecting portions are connected through one of the first extending portion and the second extending portion. As such, the antenna structure becomes three-dimensional. The present invention does not need to provide an additional region on the substrate for disposing the antenna structure, thereby reducing the width of the substrate so as to meet the miniaturization requirement of the electronic component.
    Type: Application
    Filed: March 10, 2017
    Publication date: June 29, 2017
    Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Cheng-Yu Chiang
  • Patent number: 9627748
    Abstract: An electronic component is provided, which includes a substrate having opposite first and second surfaces and an antenna structure combined with the substrate. The antenna structure has at least a first extending portion disposed on the first surface of the substrate, at least a second extending portion disposed on the second surface of the substrate, and a plurality of connecting portions disposed in the substrate for electrically connecting the first extending portion and the second extending portion. Any adjacent ones of the connecting portions are connected through one of the first extending portion and the second extending portion. As such, the antenna structure becomes three-dimensional. The present invention does not need to provide an additional region on the substrate for disposing the antenna structure, thereby reducing the width of the substrate so as to meet the miniaturization requirement of the electronic component.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: April 18, 2017
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Cheng-Yu Chiang
  • Publication number: 20160225728
    Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.
    Type: Application
    Filed: April 8, 2016
    Publication date: August 4, 2016
    Inventors: Tsung-Hsien Tsai, Heng-Cheng Chu, Chien-Cheng Lin, Chih-Hsien Chiu, Hsin-Lung Chung, Yude Chu
  • Patent number: 9337250
    Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: May 10, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Tsung-Hsien Tsai, Heng-Cheng Chu, Chien-Cheng Lin, Chih-Hsien Chiu, Hsin-Lung Chung, Yude Chu
  • Publication number: 20150162661
    Abstract: An electronic component is provided, which includes a substrate having opposite first and second surfaces and an antenna structure combined with the substrate. The antenna structure has at least a first extending portion disposed on the first surface of the substrate, at least a second extending portion disposed on the second surface of the substrate, and a plurality of connecting portions disposed in the substrate for electrically connecting the first extending portion and the second extending portion. Any adjacent ones of the connecting portions are connected through one of the first extending portion and the second extending portion. As such, the antenna structure becomes three-dimensional. The present invention does not need to provide an additional region on the substrate for disposing the antenna structure, thereby reducing the width of the substrate so as to meet the miniaturization requirement of the electronic component.
    Type: Application
    Filed: January 9, 2014
    Publication date: June 11, 2015
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
    Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Cheng-Yu Chiang
  • Publication number: 20150123251
    Abstract: A semiconductor package is disclosed, which includes: a packaging structure having at least a semiconductor element; and at least three shielding layers sequentially stacked on the packaging structure so as to cover the semiconductor element, wherein a middle layer of the shielding layers is lower in electrical conductivity than adjacent shielding layers on both sides of the middle layer, thereby reducing electromagnetic interferences so as to increase the shielding effectiveness.
    Type: Application
    Filed: December 19, 2013
    Publication date: May 7, 2015
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
    Inventors: Chih-Hsien Chiu, Chia-Yang Chen, Tsung-Hsien Tsai, Heng-Cheng Chu, Cheng-Yu Chiang
  • Patent number: 8962396
    Abstract: A carrier-free semiconductor package includes a circuit structure having an insulating layer and a circuit layer embedded in the insulating layer and having a plurality of conductive traces and RF (radio frequency) traces, a chip disposed on a first surface of the insulating layer and electrically connected to the conductive traces, an encapsulant covering the chip and the circuit layer, a ground layer formed on a second surface of the insulating layer opposite to the first surface, and a plurality of solder balls disposed on the conductive traces or terminals on the conductive traces, wherein portions of the solder balls electrically connect the ground layer so as to allow the RF traces and the ground layer to form a microstrip line having an RF function, thus obtaining a single-layer carrier-free semiconductor package having low cost and simplified RF design.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: February 24, 2015
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Ching-Hua Chen, Heng-Cheng Chu, Hsin-Lung Chung, Chih-Hsien Chiu, Chia-Yang Chen
  • Patent number: 8963299
    Abstract: A semiconductor package is provided, including: a substrate having at least a conductive pad; a semiconductor element disposed on the substrate; a conductive adhesive formed on top and side surfaces of the semiconductor element and extending to the conductive pad; and an electronic element disposed on the conductive adhesive. The conductive adhesive and the conductive pad form a shielding structure so as to prevent electromagnetic interference from occurring between the semiconductor element and the electronic element.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: February 24, 2015
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chien-Cheng Lin, Tsung-Hsien Hsu, Heng-Cheng Chu, Chao-Ya Yang, Chih-Ming Cheng
  • Publication number: 20140210672
    Abstract: An electronic package structure is provided, including a substrate, a package encapsulant disposed on the substrate, and an antenna structure corresponding to a disposing area of the package encapsulant and having a first extension layer, a second extension layer disposed on the substrate, and a connection portion disposed between and electrically connected to the first extension layer and the second extension layer. Through the formation of the antenna structure on the disposing area of the package encapsulant, the substrate is not required to be widen, and, as such, the electronic package structure meets the miniaturization requirement.
    Type: Application
    Filed: December 16, 2013
    Publication date: July 31, 2014
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
    Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Chien-Cheng Lin, Tsung-Hsien Tsai, Chao-Ya Yang, Yude Chu
  • Publication number: 20140210687
    Abstract: An electronic package is provided, which includes: a substrate; at least an electronic element disposed on the substrate; an antenna structure disposed on the substrate; and an encapsulant formed on the substrate for encapsulating the electronic element and the antenna structure. Therein, the antenna structure has an extension portion and a plurality of support portions connected to the extension portion for supporting the extension portion over the substrate so as to save the surface area of the substrate, thereby meeting the miniaturization requirement of the electronic package.
    Type: Application
    Filed: December 5, 2013
    Publication date: July 31, 2014
    Applicant: Silconware Precision Industries Co., Ltd.
    Inventors: CHIH-HSIEN CHIU, Heng-Cheng CHU, Chien-Cheng LIN, Tsung-Hsien TSAI, Chao-Ya YANG
  • Publication number: 20140203395
    Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.
    Type: Application
    Filed: November 22, 2013
    Publication date: July 24, 2014
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
    Inventors: Tsung-Hsien Tsai, Heng-Cheng Chu, Chien-Cheng Lin, Chih-Hsien Chiu, Hsin-Lung Chung, Yude Chu
  • Publication number: 20140080265
    Abstract: A carrier-free semiconductor package includes a circuit structure having an insulating layer and a circuit layer embedded in the insulating layer and having a plurality of conductive traces and RF (radio frequency) traces, a chip disposed on a first surface of the insulating layer and electrically connected to the conductive traces, an encapsulant covering the chip and the circuit layer, a ground layer formed on a second surface of the insulating layer opposite to the first surface, and a plurality of solder balls disposed on the conductive traces or terminals on the conductive traces, wherein portions of the solder balls electrically connect the ground layer so as to allow the RF traces and the ground layer to form a microstrip line having an RF function, thus obtaining a single-layer carrier-free semiconductor package having low cost and simplified RF design.
    Type: Application
    Filed: November 21, 2013
    Publication date: March 20, 2014
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
    Inventors: Ching-Hua Chen, Heng-Cheng Chu, Hsin-Lung Chung, Chih-Hsien Chiu, Chia-Yang Chen