Abstract: An integrated control management system includes an input output device. The input output device includes a database, a memory module, a first processing module, and a second processing module. The memory module receives and stores a plurality of integrated control commands, and one of the integrated control commands is generated based on a hardware control command for setting a hardware control transmitted by another input and output device. The first processing module reads the integrated control command from the memory module and obtains the hardware control data from the integrated control command. The first processing module updates the hardware control data to the database. The second processing module reads the database and updates the hardware control data stored in the database to another database in another input output device. The second processing module sets the hardware control based on the hardware control data stored in the database.

Abstract: A boot method for an embedded system is provided. The embedded system includes two mainboards each provided with a baseboard management controller (BMC), a non-volatile memory unit and a network adapter. When the embedded system is turned on, each of the BMCs performs a boot procedure, and then loads an operating system (OS) image file from a corresponding non-volatile memory unit to execute an operating system. When one BMC fails to load the OS image file or to execute the operating system, the BMC causes the corresponding network adapter to communicate with the other network adapter to acquire the OS image file from the non-volatile memory unit on the other mainboard, so as to replace the OS image file in the corresponding non-volatile memory unit, and directly loads the OS image thus acquired to execute the operating system.

Abstract: A method of data synchronization is to be implemented by a redundant server system including an active input/output module (IOM) and a passive IOM. The method includes: allocating a primary transfer buffer in the active IOM; allocating a secondary transfer buffer in the passive IOM; collecting pieces of secondary dedicated-sensor data, and storing the pieces of secondary dedicated-sensor data in the primary transfer buffer at once; collecting pieces of primary dedicated-sensor data; after the pieces of primary dedicated-sensor data have been collected, updating the primary state data based on the pieces of primary dedicated-sensor data thus collected and the pieces of secondary dedicated-sensor data stored in the primary transfer buffer at once, and storing the primary state data thus updated in the secondary transfer buffer; and updating the secondary state data based on the primary state data that have been updated and that are stored in the secondary transfer buffer.

Abstract: A boot method for an embedded system is provided. The embedded system includes two mainboards each provided with a baseboard management controller (BMC), a non-volatile memory unit and a network adapter. When the embedded system is turned on, each of the BMCs performs a boot procedure, and then loads an operating system (OS) image file from a corresponding non-volatile memory unit to execute an operating system. When one BMC fails to load the OS image file or to execute the operating system, the BMC causes the corresponding network adapter to communicate with the other network adapter to acquire the OS image file from, the non-volatile memory unit on the other mainboard, so as to replace the OS image file in the corresponding non-volatile memory unit, and directly loads the OS image thus acquired to execute the operating system.

Abstract: An integrated control management system includes an input output device. The input output device includes a database, a memory module, a first processing module, and a second processing module. The memory module receives and stores a plurality of integrated control commands, and one of the integrated control commands is generated based on a hardware control command for setting a hardware control transmitted by another input and output device. The first processing module reads the integrated control command from the memory module and obtains the hardware control data from the integrated control command. The first processing module updates the hardware control data to the database. The second processing module reads the database and updates the hardware control data stored in the database to another database in another input output device. The second processing module sets the hardware control based on the hardware control data stored in the database.

Abstract: An amplifier device includes an alternate current (AC) coupling circuit, an amplifier circuit, and a first bias circuit. The amplifier circuit is configured to amplify an input signal to generate an output signal, in which the amplifier circuit includes a first input terminal, and the first input terminal receives the input signal via the AC coupling circuit. The first bias circuit is configured to apply a first bias voltage to the first input terminal according to one of the output signal and a first voltage, such that the amplifier circuit amplifies the input signal to output the output signal.

Abstract: A display apparatus includes a substrate, an element layer, a protective film, a mechanical member, a first adhesive layer and a second adhesive layer. An opening of the protective film is located between a first portion of the protective film and a second portion of the protective film. The first portion of the protective film, the second portion of the protective film and the opening of the protective film are respectively overlapped with a first portion of the substrate, a second portion of the substrate and a third portion of the substrate. The first adhesive layer and the second adhesive layer are respectively disposed on a first surface and a second surface of the mechanical member. The third portion of the substrate is connected between the first portion of the substrate and the second portion of the substrate, and the third portion of the substrate is bent.

Abstract: An amplifier device includes an alternate current (AC) coupling circuit, an amplifier circuit, and a first bias circuit. The amplifier circuit is configured to amplify an input signal to generate an output signal, in which the amplifier circuit includes a first input terminal, and the first input terminal receives the input signal via the AC coupling circuit. The first bias circuit is configured to apply a first bias voltage to the first input terminal according to one of the output signal and a first voltage, such that the amplifier circuit amplifies the input signal to output the output signal.

Abstract: A display apparatus includes a substrate, an element layer, a protective film, a mechanical member, a first adhesive layer and a second adhesive layer. An opening of the protective film is located between a first portion of the protective film and a second portion of the protective film. The first portion of the protective film, the second portion of the protective film and the opening of the protective film are respectively overlapped with a first portion of the substrate, a second portion of the substrate and a third portion of the substrate. The first adhesive layer and the second adhesive layer are respectively disposed on a first surface and a second surface of the mechanical member. The third portion of the substrate is connected between the first portion of the substrate and the second portion of the substrate, and the third portion of the substrate is bent.

Abstract: A transmission circuit includes: a first transistor, a first current source, a third transistor. The first transistor has a source terminal coupled to a first reference voltage terminal of the transmission circuit and a drain terminal coupled to a first output terminal of the transmission circuit. The first current source is coupled between a gate terminal of the first transistor and a second reference voltage terminal of the transmission circuit. The third transistor has a drain terminal coupled to the first output terminal of the transmission circuit, a source terminal coupled to the second reference voltage terminal of the transmission circuit, and a gate terminal for receiving a first input signal. The first transistor is of a first conducting type, and the second transistor is of a second conducting type different from the first conducting type.

Abstract: A method is for updating an original firmware file of an I/O module which communicates with multiple host-end devices and stores the original firmware file. The method includes: receiving a current-received data packet from one host-end device; when it is determined that the current-received data packet is a first data packet constituting an update file, and that the original firmware file is not undergoing an update process, setting a status flag to indicate that the original firmware file is undergoing an update process, storing the current-received data packet; and repeating the previous steps when it is determined that the current-received data packet is not a last one data packet constituting the update file.

Abstract: A method is for updating an original firmware file of an I/O module which communicates with multiple host-end devices and stores the original firmware file. The method includes: receiving a current-received data packet from one host-end device; when it is determined that the current-received data packet is a first data packet constituting an update file, and that the original firmware file is not undergoing an update process, setting a status flag to indicate that the original firmware file is undergoing an update process, storing the current-received data packet; and repeating the previous steps when it is determined that the current-received data packet is not a last one data packet constituting the update file.

Abstract: A transmission circuit includes: a first transistor, a first current source, a third transistor. The first transistor has a source terminal coupled to a first reference voltage terminal of the transmission circuit and a drain terminal coupled to a first output terminal of the transmission circuit. The first current source is coupled between a gate terminal of the first transistor and a second reference voltage terminal of the transmission circuit. The third transistor has a drain terminal coupled to the first output terminal of the transmission circuit, a source terminal coupled to the second reference voltage terminal of the transmission circuit, and a gate terminal for receiving a first input signal. The first transistor is of a first conducting type, and the second transistor is of a second conducting type different from the first conducting type.

Abstract: A transmission circuit includes: a first transistor, having a source terminal coupled to a first reference voltage terminal of the transmission circuit and a drain terminal coupled to a first output terminal of the transmission circuit; a second transistor, having a source terminal coupled to a gate of the first transistor, and a drain terminal coupled to the first output terminal of the transmission circuit; and a third transistor, having a drain terminal coupled to the first output terminal of the transmission, a source terminal coupled to a second reference voltage terminal of the transmission, and a gate terminal for receiving a first input signal; wherein the first and second transistors are of a first conducting type, and the third transistor is of a second conducting type different from the first conducting type.

Abstract: A detecting circuit for determining a connection status between a first pin and a second pin includes a signal generation unit, a logic unit and a determining unit. The signal generation unit is coupled to the first pin, and arranged for generating a first signal to the first pin. The logic unit is coupled to the signal generation unit and the second pin, and arranged for generating a determining signal according to the first signal inputted to the first pin and a second signal received from the second pin. The determining unit is coupled to the logic unit, and arranged for determining the connection status between the first pin and the second pin according to the determining signal.

Abstract: A transmission circuit includes: a first transistor, having a source terminal coupled to a first reference voltage terminal of the transmission circuit and a drain terminal coupled to a first output terminal of the transmission circuit; a second transistor, having a source terminal coupled to a gate of the first transistor, and a drain terminal coupled to the first output terminal of the transmission circuit; and a third transistor, having a drain terminal coupled to the first output terminal of the transmission, a source terminal coupled to a second reference voltage terminal of the transmission, and a gate terminal for receiving a first input signal; wherein the first and second transistors are of a first conducting type, and the third transistor is of a second conducting type different from the first conducting type.

Abstract: A detecting circuit for determining a connection status between a first pin and a second pin includes a signal generation unit, a logic unit and a determining unit. The signal generation unit is coupled to the first pin, and arranged for generating a first signal to the first pin. The logic unit is coupled to the signal generation unit and the second pin, and arranged for generating a determining signal according to the first signal inputted to the first pin and a second signal received from the second pin. The determining unit is coupled to the logic unit, and arranged for determining the connection status between the first pin and the second pin according to the determining signal.