Abstract: A pixel array substrate and a display panel are provided. The pixel array substrate includes a substrate, scan line groups, data lines, and pixel structures. The scan line groups are disposed on the substrate. The data lines are intersected with the scan line groups. The pixel structures are connected to the scan line groups and the data lines. Each pixel structure includes an active device group, a first pixel electrode, a second pixel electrode, and a connection electrode. The first pixel electrode is located between the second pixel electrode and the nth scan line group. The connection electrode is located at a side of the first pixel electrode adjacent to one data line. The second pixel electrode is electrically connected to the active device group through the connection electrode. The connection electrode, the first pixel electrode, and the second pixel electrode are of the same layer.

Abstract: Disclosed are a crystal form of (6S)-5-methyltetrahydrofolate salt and a method for preparing the same. The crystal form is: Form C of the crystal form of (6S)-5-methyltetrahydrofolate calcium salt, where the X-ray diffraction pattern has diffraction peaks at the 2? angles of 6.3±0.2 and 19.2±0.2; or the crystal form of (6S)-5-methyltetrahydrofolate strontium salt, where the X-ray diffraction pattern has diffraction peaks at the 2? angles of 6.5±0.2 and 22.0±0.2. The crystal form of (6S)-5-methyltetrahydrofolate salt of the present invention has the advantages of excellent physicochemical properties, good stability, high purity, good reproducibility, and being more suitable for production on an industrial scale.

Abstract: The present invention provides a polymer stabilization alignment liquid crystal display panel having a plurality of pixel regions defined by plurals of data lines and gate lines. Each pixel region includes a main region and a sub region, and a first pixel electrode and a second pixel electrode correspond to the main region and the sub region respectively, wherein each of the data lines has a first width adjacent to the main display region and a second width adjacent to the sub display region, and the second width is larger than the first width. Each first pixel electrode is separated from the adjacent data line and thereby forming a gap therebetween. Each second pixel electrode partially overlaps the adjacent data line to form an overlap width. Accordingly, the present invention not only can increase the aperture ratio, but also well control the liquid crystal molecules located near the data lines.

Abstract: In a metrology sampling method, various index values that can detect various status changes of a process tool (such as maintenance operation, parts changing, parameter adjustment, etc.), and/or information abnormalities of the process tool (such as abnormal process data, parameter drift/shift, abnormal metrology data, etc.) appear in a manufacturing process are applied to develop an intelligent sampling decision (ISD) scheme for reducing sampling rate while VM accuracy is still sustained. The indices includes a reliance Index (RI), a global similarity index (GSI), a process data quality index (DQIX) and a metrology data quality index (DQIy).

Abstract: A thin film touch panel structure includes a sensor film, a cover glass having a top surface and a bottom surface, and an optical adhesive layer between the sensor film and the cover glass. The sensor film is adhered to the bottom surface of the cover glass through the optical adhesive layer. The optical adhesive layer or any layer in the sensor film provides a sharp cutoff of UV light with a wavelength below 400 nm.

Abstract: A touch panel includes a substrate, a touch sensing element, a plurality of transmission lines, a first frame structure, and a second frame structure is provided. The touch sensing element is disposed on the substrate to define an active region. The transmission lines are connected to the touch sensing element. The first frame structure is disposed on the substrate and surrounding the active region to define a first periphery region. The transmission lines are at least partially located on a top surface of the first frame structure. The second frame structure is disposed on the substrate and surrounding the first frame structure, wherein the second frame structure is disposed at an outer border of the first periphery region. A material of the first frame structure is different from a material of the second frame structure.

Abstract: A method of synthesizing copolymers is provided. The method can include coupling a degradable polymer to a poly(amino acid) and then deprotecting the copolymer if the poly(amino acid) contains protected side chains. Copolymer compositions are provided. These compositions include PLGA-PLL copolymers, PLGA-PLL-cbz copolymers, and copolymers of a polyester with a carboxylic acid end group coupled to a poly(amino acid) with an amine group. The compositions may include therapeutic blends and formulations of copolymers.

Abstract: A thin film transistor (TFT) array includes a substrate, a thin film transistor, a first wall, a transparent electrode and a color resist. The thin film transistor is disposed on the substrate. The first wall is disposed on the substrate and separates a first contact hole from a pixel region on the substrate, wherein the first contact hole exposes a drain electrode of the thin film transistor. The first wall has a first sidewall facing towards the first contact hole and a second sidewall facing towards the pixel region, wherein the slope of the first sidewall is gentler than the slope of the second sidewall. The transparent electrode is electrically connected to the drain electrode of the thin film transistor through the first contact hole. The pixel region is filled with the color resist.

Abstract: A control apparatus for a power quality device comprises: a power quality analysis module, for sampling a power supply network to obtain a power quality information, and performing an analysis and computing on the sampling, so as to output an instruction information; N tracking control modules, for receiving respectively the instruction information and tracking the instruction information, so as to output N PWM control signals having a same frequency and constant phase shift therebetween, where N is a positive integer and N?2, thereby to control the power quality device; wherein the power quality analysis module and the N tracking control modules are operated based on a synchronized signal.

Abstract: Accessory device power management techniques are described in which a power exchange state for a system including a host computing device, an accessory device, and an adapter is recognized. Power exchange states may be defined according to relative states of charge (RSOC) and connection status for the system components and mapped to power management control actions. Responsive to the recognition of a current power exchange state, corresponding power management control actions may be ascertained and applied to jointly manage power for the system. For instance, the host device may draw supplemental power from a power source associated with an accessory device (e.g., a battery or power adapter) or supply power for use by the accessory device according to different states. Power exchanges may also be managed in accordance with capabilities of the accessory device identified based on authentication of the accessory device.

Abstract: A method of processing a substrate or panel is disclosed. A substrate having thereon an array of chips is provided. A mask layer is laminated on the substrate. The mask layer has a plurality of openings to reveal active areas of the chips respectively. A spray-coating process is then performed to form an adhesive film in the active areas. The mask layer is then stripped off.

Abstract: An electronic device, including a circuit board, a communication chip, a first heat sink, a fixer and a shielding mask, is provided. The circuit board has a frame having an opening and several rims surrounding the opening. The communication chip, disposed on the circuit board, is located in the opening of the frame. The first heat sink, disposed on the communication chip, has a first surface facing and contacting the communication chip. The fixer is fixed into the circuit board and the first heat sink, such that the first heat sink remains contacting the communication chip. The shielding mask, disposed on the circuit board, includes a cover and several side boards. The cover covers the communication chip and the first heat sink, such that the cover contacts a second surface of the first heat sink. The side boards are opposite and connected to the rims in parallel.

Abstract: Disclosed are a crystal form of (6S)-5-methyltetrahydrofolate salt and a method for preparing the same. The crystal form is: Form C of the crystal form of (6S)-5-methyltetrahydrofolate calcium salt, where the X-ray diffraction pattern has diffraction peaks at the 2? angles of 6.3±0.2 and 19.2±0.2; or the crystal form of (6S)-5-methyltetrahydrofolate strontium salt, where the X-ray diffraction pattern has diffraction peaks at the 2? angles of 6.5±0.2 and 22.0±0.2. The crystal form of (6S)-5-methyltetrahydrofolate salt of the present invention has the advantages of excellent physicochemical properties, good stability, high purity, good reproducibility, and being more suitable for production on an industrial scale.

Abstract: A pixel structure including a substrate, a scan line, a first data line, a second data line, a first pixel unit and a second pixel unit is provided. The first pixel unit includes a first active device and a first pixel electrode. The first active device is electrically connected to the scan line and the first data line. The first pixel electrode electrically connected to the first active device and has a plurality of first branches. The first branches outwardly extend from a center of the first pixel unit, and a projection of the first branches are separated from a projection of the adjacent first data line projecting onto the substrate, and the first pixel electrode is apart from the adjacent first data line with a distance. The second pixel unit located between the first data line and the second data line.

Abstract: A display degradation compensation system and method for adjusting the operating conditions for pixels in an OLED display to compensate for non-uniformity or aging of the display. The system or method sets an initial value for at least one of peak luminance and an operating condition, calculates compensation values for the pixels in the display, determines the number of pixels having compensation values larger than a predetermined threshold compensation value, and if the determined number of pixels having compensation values larger than said predetermined threshold value is greater than a predetermined threshold number, adjusts the set value until said determined number of pixels is less than said predetermined threshold number.

Abstract: A thin film transistor (TFT) array includes a substrate, a thin film transistor, a first wall, a transparent electrode and a color resist. The thin film transistor is disposed on the substrate. The first wall is disposed on the substrate and separates a first contact hole from a pixel region on the substrate, wherein the first contact hole exposes a drain electrode of the thin film transistor. The first wall has a first sidewall facing towards the first contact hole and a second sidewall facing towards the pixel region, wherein the slope of the first sidewall is gentler than the slope of the second sidewall. The transparent electrode is electrically connected to the drain electrode of the thin film transistor through the first contact hole. The pixel region is filled with the color resist.

Abstract: A pixel structure including a substrate, a scan line, a first data line, a second data line, a first pixel unit and a second pixel unit is provided. The first pixel unit includes a first active device and a first pixel electrode. The first active device is electrically connected to the scan line and the first data line. The first pixel electrode electrically connected to the first active device and has a plurality of first branches. The first branches outwardly extend from a center of the first pixel unit, and a projection of the first branches are separated from a projection of the adjacent first data line projecting onto the substrate, and the first pixel electrode is apart from the adjacent first data line with a distance. The second pixel unit located between the first data line and the second data line.

Abstract: A thin film transistor (TFT) array includes a substrate, a thin film transistor, a first wall, a transparent electrode and a color resist. The thin film transistor is disposed on the substrate. The first wall is disposed on the substrate and separates a first contact hole from a pixel region on the substrate, wherein the first contact hole exposes a drain electrode of the thin film transistor. The first wall has a first sidewall facing towards the first contact hole and a second sidewall facing towards the pixel region, wherein the slope of the first sidewall is gentler than the slope of the second sidewall. The transparent electrode is electrically connected to the drain electrode of the thin film transistor through the first contact hole. The pixel region is filled with the color resist.

Abstract: A liquid crystal displayer and control method thereof are disclosed. The liquid crystal displayer capable of displaying image in a three dimensional mode comprises a display panel, a first timing controller, a second timing controller and a control module. The first timing controller and the second timing controller are electrically coupled to the display panel. While receiving multiple frames, the control module controls the first timing controller according to a refresh frequency of the frames, to feed the frames to the panel based on a frame clock, and controls the second timing controller to invert the signal polarity of the frames based on an inversion clock.

Abstract: A system and method for driving an AMOLED display is provided. The AMOLED display includes a plurality of pixel circuits. A voltage-programming scheme, a current-programming scheme or a combination thereof is applied to drive the display. Threshold shift information, and/or voltage necessary to obtain hybrid driving circuit may be acquired. A data sampling may be implemented to acquire a current/voltage relationship. A feedback operation may be implemented to correct the brightness of the pixel.